From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E52D8312813; Mon, 10 Nov 2025 14:29:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762784950; cv=none; b=E8XvkZGDIQ04X10mBH0LstsAnvDNoxJJ5lI6+CPpp2h+8KFy0UQztkcZBmrbiFfSvu/fmaH128oeV1Rsj+An7puOnnoQJ0DCjZHUByjwLB6NLEMLPjfJUqqPCH7hovbKWyj71/J2kENbUEFX70GcWV84xNH+mANmW94JC3DQYWQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762784950; c=relaxed/simple; bh=T+QKJlyYpK0J8p8YQ+LHF05Ncc6rQkcMI/cu/2kofT8=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=Kfz4Lk6zK38XnkKE96HAYCG33tRh/lekBc48zzq1FkYIFy0F404F6mvXJ35Bp6FiXJdj0jVuPmiiIffPsZwzOunSxEcj+MUoFGp/sYqE5nElBbP/y2OGbM7S+cz/RjEpoRXIZw+N4wpG33gKl/OYEQTRbbqnHNWqhEovMaB6oTk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=JDxgyhIW; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="JDxgyhIW" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 50D37C116B1; Mon, 10 Nov 2025 14:29:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1762784948; bh=T+QKJlyYpK0J8p8YQ+LHF05Ncc6rQkcMI/cu/2kofT8=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=JDxgyhIWYi/CK6nSh01oC00hRc42uvHtxEdFb1w55s8HmwJVAJi0MrACPJN7B6WXE m/nngJVqxuLo3/ye4pMb2F/sFScT1aYf2AAiwjPG19irbVJiiNa+CpBLbBb1Ga/Hs0 rmJ+pLqMHftYvpB1nGVu6NHuWDR7CEYqUcOWbA5JuXog+1cWwdG7AtGIamXgTTvBUE C56v1OjZe7R1G1J1KrEbnPP+UQdW+9BgenUT4LMsZPO7ILeNlVN1otISInhl8kZDCp AOanKAnBZcMyLZftb5UG04xpH06PhoQMCbdOVbE3KDoibxLnc4PAOHkJLWdHAlVzjh bX/8EwQDCIzOA== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1vIStG-00000003tLC-13Vz; Mon, 10 Nov 2025 14:29:06 +0000 Date: Mon, 10 Nov 2025 14:29:05 +0000 Message-ID: <864ir2ufke.wl-maz@kernel.org> From: Marc Zyngier To: Mark Brown Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, Joey Gouly , Suzuki K Poulose , Oliver Upton , Zenghui Yu , Peter Maydell , Paolo Bonzini , Aishwarya.TCV@arm.com Subject: Re: [PATCH v2 3/3] KVM: arm64: Limit clearing of ID_{AA64PFR0,PFR1}_EL1.GIC to userspace irqchip In-Reply-To: References: <20251030122707.2033690-1-maz@kernel.org> <20251030122707.2033690-4-maz@kernel.org> <865xbiuj6e.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: broonie@kernel.org, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, joey.gouly@arm.com, suzuki.poulose@arm.com, oliver.upton@linux.dev, yuzenghui@huawei.com, peter.maydell@linaro.org, pbonzini@redhat.com, Aishwarya.TCV@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Mon, 10 Nov 2025 14:15:27 +0000, Mark Brown wrote: > > On Mon, Nov 10, 2025 at 01:11:05PM +0000, Marc Zyngier wrote: > > Mark Brown wrote: > > > > Today's next/pending-fixes is showing regressions on a range of physical > > > arm64 platforms (including at least a bunch of A53 systems, an A55 one > > > and an A72 one) in the steal_time selftest which bisect to this patch. > > > We get asserts in the kernel on ID register sets: > > > Please name the platforms this fails on. Here, on a sample of one A72 > > box, I don't see the issue: > > It looks like it's GICv2 that's affected - I'm seeing this on at least > Raspberry Pi 3B+ and 4, Pine 64 Plus and Libretech Potato, Solitude and > Tritum. The platforms with GICv3 that I have results for (eg, the > Toradex Verdin i.MX8MP and Mallow AM625) all seem fine. Yeah, I just found out by exhuming the dusty dregs. As it turns out, this catches a pre-existing bug that wasn't noticed until we moved over to the standard accessors rather than bypassing them. The hack below fixes it for me on XGene. M. diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 3bf7005258f07..19afcd833d6fa 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -5624,7 +5624,11 @@ int kvm_finalize_sys_regs(struct kvm_vcpu *vcpu) guard(mutex)(&kvm->arch.config_lock); - if (!irqchip_in_kernel(kvm)) { + /* + * This hacks into the ID registers, so only perform it when the + * first vcpu runs, or the kvm_set_vm_id_reg() helper will scream. + */ + if (!irqchip_in_kernel(kvm) && !kvm_vm_has_ran_once(kvm)) { u64 val; val = kvm_read_vm_id_reg(kvm, SYS_ID_AA64PFR0_EL1) & ~ID_AA64PFR0_EL1_GIC; -- Without deviation from the norm, progress is not possible.