From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F316C35975; Mon, 9 Dec 2024 15:15:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733757360; cv=none; b=TW9y7g1gakWfaMWshuyPXnEupMsTgGHeZQD8k+ViZMvCjRJHNYGQEiBC2nAKZsNGriTv6txyTLXbkhuMk8HN0BDLrGFdAlnRR0JfRU+oJ8CuFijSiHWigfvCN8mVJYabUb5/HRm7724MsdcJ7vZyuxKevshA4K2zgeItl9D5/Fc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733757360; c=relaxed/simple; bh=mcjsf124K02oDwscCt6MS031CZT8Tzgco1aQjG7wAmA=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=ZrZo0Wc77aL5Jy+CZdDzfXltH/Yf8XNXP6nPuYCgjjTQzej7p24LaxLWq/5K+UuEWSdiblQhhAl6cQ8qzoZRJA1T3mW09lJknpw/f0bCQqHgUJ67N6vkwvFE2baiMFw0ZzCfih33NkEpcI/G5XRda+p7WiBpZeLqwsVKmCeYKV8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=nJlASOXa; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="nJlASOXa" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 77FC4C4CED1; Mon, 9 Dec 2024 15:15:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1733757359; bh=mcjsf124K02oDwscCt6MS031CZT8Tzgco1aQjG7wAmA=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=nJlASOXa3tZr3ijkUcVgDFy/kwmLac4beue++sR7ndcHfPUDuM0VeMwrqSfnr+7dZ 6iZq/O7vOnnjI9PHgpfwgxmCXmbfwlcn1cdVHHnDkqmomkSJ/JYxm4bnOTMz9nnDDy GHdc4nWStVwa+0BHuqKWnJWqHUEku2o9LziBjNXTf2AeP367PFK3JCQtaietyXmuio qd6LbKkmf3AA8RuAp5/74MzUengrIuFYltf9ZC2HkyG9C6CLLKOsqu8QGvk53Ud6A/ KZ//qaE9wQD58s4m6NdBvCBM3e9YnOk8LCOPvJ8j+59+j+q0B1Ej+RIdYTBa3u5Kwu +izeADjr4Srtg== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1tKfUL-001vMG-5J; Mon, 09 Dec 2024 15:15:57 +0000 Date: Mon, 09 Dec 2024 15:15:56 +0000 Message-ID: <864j3cubtf.wl-maz@kernel.org> From: Marc Zyngier To: Chase Conklin Cc: andersson@kernel.org, christoffer.dall@arm.com, joey.gouly@arm.com, kvm@vger.kernel.org, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, oliver.upton@linux.dev, suzuki.poulose@arm.com, yuzenghui@huawei.com Subject: Re: [PATCH 00/11] KVM: arm64: Add NV timer support In-Reply-To: <20241209142429.882-1-chase.conklin@arm.com> References: <20241202172134.384923-1-maz@kernel.org> <20241209142429.882-1-chase.conklin@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: chase.conklin@arm.com, andersson@kernel.org, christoffer.dall@arm.com, joey.gouly@arm.com, kvm@vger.kernel.org, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, oliver.upton@linux.dev, suzuki.poulose@arm.com, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Hi Chase, On Mon, 09 Dec 2024 14:24:29 +0000, Chase Conklin wrote: > > Hi Marc, > > On Mon, 2 Dec 2024 17:21:23 +0000, Marc Zyngier > wrote: > > > If you are feeling brave, you can run the whole thing from [1]. > > > > [1] https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=kvm-arm64/nv-next > > > > I was feeling brave, and I think I see an issue in the cpufeature change > in the kvm-arm64/nv-e2h-select branch that's a part of > kvm-arm64/nv-next. In d75a4820a897 ("arm64: cpufeature: Handle NV_frac as a synonym of NV2"), > I don't see NV_frac being added to the FTR bits. I believe that means it > will get sanitized out and consequently not seen by the NV feature > detection code. Does that commit also need: > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > index 9fa8bd77ae0..f97459e160b 100644 > --- a/arch/arm64/kernel/cpufeature.c > +++ b/arch/arm64/kernel/cpufeature.c > @@ -480,6 +480,7 @@ static const struct arm64_ftr_bits ftr_id_aa64mmfr3[] = { > > static const struct arm64_ftr_bits ftr_id_aa64mmfr4[] = { > S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR4_EL1_E2H0_SHIFT, 4, 0), > + S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR4_EL1_NV_frac_SHIFT, 4, 0), > ARM64_FTR_END, > }; Ah, I always get tripped by that one. You are absolutely correct, this is needed. I'll fold that in. Thanks again, M. -- Without deviation from the norm, progress is not possible.