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From: Marc Zyngier <maz@kernel.org>
To: sashiko-reviews@lists.linux.dev
Cc: kvmarm@lists.linux.dev, kvm@vger.kernel.org,
	"Oliver\ Upton" <oupton@kernel.org>
Subject: Re: [PATCH v2 8/8] KVM: arm64: Add VNCR TLB tracking again
Date: Thu, 06 Aug 2026 12:54:26 +0100	[thread overview]
Message-ID: <865x1nbh1p.wl-maz@kernel.org> (raw)
In-Reply-To: <20260806093552.C9F4B1F00A3A@smtp.kernel.org>

On Thu, 06 Aug 2026 10:35:52 +0100,
sashiko-bot@kernel.org wrote:
> 
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> 
> Pre-existing issues:
> - [High] The fast-path TLBI handler incorrectly skips the slow path for native EL2 TLBI instructions when E2H or TGE is clear, bypassing software VNCR TLB invalidation and leaving stale mappings.
> --
> 
> --- Patch [8]: [PATCH v2 8/8] KVM: arm64: Add VNCR TLB tracking again ---
> commit 65741607ee5db3e8d57cf0e1773bb1031e83a3ee
> Author: Marc Zyngier <maz@kernel.org>
> 
> KVM: arm64: Add VNCR TLB tracking again
> 
> This commit introduces a VM-wide counter to track valid VNCR TLBs. It aims
> to improve performance by taking the TLBI slow path only when there are
> active VNCR TLBs that need invalidation.
> 
> > diff --git a/arch/arm64/kvm/hyp/vhe/switch.c b/arch/arm64/kvm/hyp/vhe/switch.c
> > --- a/arch/arm64/kvm/hyp/vhe/switch.c
> > +++ b/arch/arm64/kvm/hyp/vhe/switch.c
> [ ... ]
> > @@ -424,10 +424,15 @@ static bool kvm_hyp_handle_tlbi_el2(struct kvm_vcpu *vcpu, u64 *exit_code)
> >  		return false;
> >  
> >  	/*
> > -	 * If we have to check for any VNCR mapping being invalidated,
> > -	 * go back to the slow path for further processing.
> > +	 * If we have to check for any VNCR TLB being invalidated, go back
> > +	 * to the slow path for further processing.
> > +	 *
> > +	 * The synchronisation betweem TLBI and walk is provided by the
> > +	 * speculative increment of the TLB counter on walk, and the
> > +	 * invalidation counter. Yes, this is fiddly.
> >  	 */
> > -	if (vcpu_el2_e2h_is_set(vcpu) && vcpu_el2_tge_is_set(vcpu))
> > +	if (vcpu_el2_e2h_is_set(vcpu) && vcpu_el2_tge_is_set(vcpu) &&
> > +	    atomic_read(&vcpu->kvm->arch.vncr_tlb_count))
> >  		return false;
> 
> [Severity: High]
> This is a pre-existing issue, but does this condition incorrectly skip the
> slow path for native EL2 TLBI instructions when E2H or TGE is clear?

See answer to the patch #1 review.

	M.

-- 
Without deviation from the norm, progress is not possible.

      reply	other threads:[~2026-08-06 11:54 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-06  9:10 [PATCH v2 0/8] KVM: arm64: VNCR TLB invalidation fixes Marc Zyngier
2026-08-06  9:10 ` [PATCH v2 1/8] KVM: arm64: Remove VM-wide VNCR mapping counter Marc Zyngier
2026-08-06  9:35   ` sashiko-bot
2026-08-06 11:53     ` Marc Zyngier
2026-08-07 16:45   ` Lorenzo Stoakes (ARM)
2026-08-06  9:10 ` [PATCH v2 2/8] KVM: arm64: Handle negative S1 walk levels in VNCR TLB size evaluation Marc Zyngier
2026-08-07 17:12   ` Lorenzo Stoakes (ARM)
2026-08-06  9:10 ` [PATCH v2 3/8] KVM: arm64: Consider SCTLR_EL2.M when mapping the L1 VNCR page Marc Zyngier
2026-08-06  9:27   ` sashiko-bot
2026-08-06  9:10 ` [PATCH v2 4/8] KVM: arm64: Correctly handle end of VA space TLBI invalidation Marc Zyngier
2026-08-06  9:30   ` sashiko-bot
2026-08-06 11:51     ` Marc Zyngier
2026-08-06  9:10 ` [PATCH v2 5/8] KVM: arm64: Handle VNCR TLB invalidation race with vcpu_put() VNCR unmapping Marc Zyngier
2026-08-06  9:25   ` sashiko-bot
2026-08-06  9:52     ` Marc Zyngier
2026-08-07  6:03   ` Yao Yuan
2026-08-06  9:10 ` [PATCH v2 6/8] KVM: arm64: Sign-extend VA for range-based TLBI invalidation Marc Zyngier
2026-08-06  9:10 ` [PATCH v2 7/8] KVM: arm64: Make VNCR invalidation participate in MMU invalidation retry Marc Zyngier
2026-08-06  9:10 ` [PATCH v2 8/8] KVM: arm64: Add VNCR TLB tracking again Marc Zyngier
2026-08-06  9:35   ` sashiko-bot
2026-08-06 11:54     ` Marc Zyngier [this message]

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