From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3622C2E62A8; Fri, 30 Jan 2026 09:06:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769763964; cv=none; b=fKl6xWGIle+O8I6L1VCpICGrex0c0rm7NZ+zcZx8hrIesF3GxugJ9p7Vur63srWHCfhadSwQ63c6J9YYgsXJTjvelOVRVf9yzsQmScYK+QSu6COE/xvzHn4c6Bl83m62gJxfLDLQzwJd2Co/SmcMQt77u0F2zUQYnB8ZCpO4EKE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769763964; c=relaxed/simple; bh=erZr1SdZTgF5sEQIzfWMwLeEQcYanAg+WcIEqOMQJa4=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=eBWnp65gnXD3sUdiG8YSaJCkQT9Vc/FZXa4ioB5oznEnliCb2neY5VUKs0qDk+GxjitsQ/2ArQkVGOr4FhEv6MXb+eYmdk9YnpVDPL1e8ys1yZlXjgKeWJgM8hi/NfWw9v0sY4dFUTuQVF8qnfEPW304/UI2P/G8dbTpxRuWunM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Sh53Uw8t; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Sh53Uw8t" Received: by smtp.kernel.org (Postfix) with ESMTPSA id AC0F5C4CEF7; Fri, 30 Jan 2026 09:06:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1769763963; bh=erZr1SdZTgF5sEQIzfWMwLeEQcYanAg+WcIEqOMQJa4=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=Sh53Uw8tC5HGPL7NM2neDnTDeghB2QouD1SzWo0ogaaQL7T70ttVfjyoa1BAAlq5q autxbAnEErbqPPamNs6OL/J3QBK9s5/hicX1ujzdgrif6VabJYINsZ0DHRo4mGxY3w xmUqhbi4x/vuwHLX4Ee0P3v/DmuTEZAcI22udUkb0E2pta4MUHV6p8sOpwEeY483hz o+CrJWTO+068siydv3MilzopH85GmUfiq3vxjzQZ/G3GQS9C/eHqF6hmsUXUvlXcax EiV9zZaaap53GlDOqt35jGWdj0j80Ph0xdHChxC7PnPixKccM2Cv3cij25p3eq2vt2 xKANiqr958PUw== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1vlkS1-000000070dv-0pgr; Fri, 30 Jan 2026 09:06:01 +0000 Date: Fri, 30 Jan 2026 09:06:00 +0000 Message-ID: <865x8jbhc7.wl-maz@kernel.org> From: Marc Zyngier To: Fuad Tabba Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, Joey Gouly , Suzuki K Poulose , Oliver Upton , Zenghui Yu , Will Deacon , Catalin Marinas Subject: Re: [PATCH 13/20] KVM: arm64: Move RESx into individual register descriptors In-Reply-To: References: <20260126121655.1641736-1-maz@kernel.org> <20260126121655.1641736-14-maz@kernel.org> <86a4xwbakk.wl-maz@kernel.org> <868qdgb8ct.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: tabba@google.com, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, joey.gouly@arm.com, suzuki.poulose@arm.com, oupton@kernel.org, yuzenghui@huawei.com, will@kernel.org, catalin.marinas@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Thu, 29 Jan 2026 18:13:18 +0000, Fuad Tabba wrote: > > > > > Actually, this interacts badly with check_feat_map(), which tries to > > find whether we have fully populated the registers, excluding the RESx > > bits. But since we consider E2H to be a reserved but, we end-up with: > > > > [ 0.141317] kvm [1]: Undefined HCR_EL2 behaviour, bits 0000000400000000 > > > > With my approach, it was possible to distinguish the architecturally > > RESx bits (defined as RES0 or RES1), as they were the only ones with > > the FORCE_RESx attribute. > > > > I can work around it with > > > > diff --git a/arch/arm64/kvm/config.c b/arch/arm64/kvm/config.c > > index 364bdd1e5be51..398458f4a6b7b 100644 > > --- a/arch/arm64/kvm/config.c > > +++ b/arch/arm64/kvm/config.c > > @@ -1283,7 +1283,7 @@ static void __init check_feat_map(const struct reg_bits_to_feat_map *map, > > u64 mask = 0; > > > > for (int i = 0; i < map_size; i++) > > - if (!(map[i].flags & FORCE_RESx)) > > + if (!(map[i].flags & FORCE_RESx) || !(map[i].bits & resx)) > > mask |= map[i].bits; > > > > if (mask != ~resx) > > > > but it becomes a bit awkward... > > If it becomes more complicated than the original, then what's the > point. Up to you whether you want to try to pursue this or not. Not more complicated, just moving the complexity somewhere else. I'll add a comment explaining the logic at this point. Overall, this is a net cleanup, I think. > From my part: > > Reviewed-by: Fuad Tabba Thank you! M. -- Without deviation from the norm, progress is not possible.