From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C0BCCAD59; Mon, 8 Jul 2024 17:00:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720458012; cv=none; b=a2iiVzHNRB/NUTa4HkakmXCYwvwIOHIUUZTPlyZ7RzXoILdFHzOcQAw2dqBmXzoEy6jLZgzcAILzkhYnXY+UlMkexZWz0Um/Qd4WqWtyqjekGX80oGQdIl4+b1aAxRcPLUi86CdR4g7KIG45/8jVLIp6BeUGBf8Db7HLxV/UzaQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720458012; c=relaxed/simple; bh=TJXRiPQGbDDadYQlPjM5Ngjt6PZe8+vDuvb31W9v/2M=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=Yub/IuJZu7fjMO/14r7aXtfs0RHVM/LlJ/4kRK0I2i73WXxe/UMZ4BUmGsp8Kh9kNnxnKxD3cXQYXqy0ipsgASGk57m25wC9kSdYKRh9YIWmeFqtyr4XC931/VCQJFCNXuJNJZz3SZKbCtyWgEMIjbEYHkcuFqqUEUm1rvfdQ+g= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=OfWubp0V; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="OfWubp0V" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 90D00C116B1; Mon, 8 Jul 2024 17:00:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1720458012; bh=TJXRiPQGbDDadYQlPjM5Ngjt6PZe8+vDuvb31W9v/2M=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=OfWubp0VahP6zI0SnnwH/MTPzr073H9EmTOxJqHzoO4AyWc+PaG9ov+g5ckG1LhoH rlR87KN4uIvcUqrzEnznPTE0/Jfdltf77SZjHmEb+oZTvh9SJIuvBvddK2yh3kJw4k klDD3CeMYhD46Vhp3/9ky6FoWSz/bGnL6Wla0naOt1E766HlWD3D81Y2BDppH5VKKF kV8Ib3qyWQ9B8OS7jVqmC/f1xnDWkGrtI6KVwbmzOeLfP/7r8stlhVMub8iE0nATda 0k1yrvJn1ZTwKL4kqIScsUNDt8Fn2Jz7UCsgux75ahgaRwgFgChIfAv9AduiXpL3Pj cOFZUVobTTCYw== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1sQrik-00AfQi-Gh; Mon, 08 Jul 2024 18:00:10 +0100 Date: Mon, 08 Jul 2024 18:00:09 +0100 Message-ID: <867cdv4y5i.wl-maz@kernel.org> From: Marc Zyngier To: Alexandru Elisei Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, James Morse , Suzuki K Poulose , Oliver Upton , Zenghui Yu , Joey Gouly Subject: Re: [PATCH 00/12] KVM: arm64: nv: Add support for address translation instructions In-Reply-To: References: <20240625133508.259829-1-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.3 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: alexandru.elisei@arm.com, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, james.morse@arm.com, suzuki.poulose@arm.com, oliver.upton@linux.dev, yuzenghui@huawei.com, joey.gouly@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Hi Alex, On Mon, 08 Jul 2024 17:28:11 +0100, Alexandru Elisei wrote: > > Hi Marc, > > On Tue, Jun 25, 2024 at 02:34:59PM +0100, Marc Zyngier wrote: > > Another task that a hypervisor supporting NV on arm64 has to deal with > > is to emulate the AT instruction, because we multiplex all the S1 > > translations on a single set of registers, and the guest S2 is never > > truly resident on the CPU. > > > > So given that we lie about page tables, we also have to lie about > > translation instructions, hence the emulation. Things are made > > complicated by the fact that guest S1 page tables can be swapped out, > > and that our shadow S2 is likely to be incomplete. So while using AT > > to emulate AT is tempting (and useful), it is not going to always > > work, and we thus need a fallback in the shape of a SW S1 walker. > > > > This series is built in 4 basic blocks: > > > > - Add missing definition and basic reworking > > > > - Dumb emulation of all relevant AT instructions using AT instructions > > > > - Add a SW S1 walker that is using our S2 walker > > I wanted to have a look at the S1 walker, and in my inbox I only have > patches #1 to #9 ("KVM: arm64: nv: Make ps_to_output_size() generally > available"). Checked on the kvm mailing list archive [1], same thing; a > google search for the string "KVM: arm64: nv: Add SW walker for AT S1 > emulation" (quotes included) turns up the cover letter. > > Am I looking in the wrong places? > > [1] https://www.spinics.net/lists/kvm/msg351826.html This is very odd. I probably have sent them by specifying 000*patch instead of 00*patch, hence the truncation to 9 patches. Let me try and send the delta. With a bit of luck, it won't make a mess in the archive[1]. Thanks for the heads up, M. [1] https://lore.kernel.org/all/20240625133508.259829-1-maz@kernel.or -- Without deviation from the norm, progress is not possible.