From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CE6C1287267; Thu, 25 Sep 2025 09:25:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758792317; cv=none; b=gy/C9PfrqkEDPaZ3wcZVL2+y4y6Mycf1EGHfVNEDBoNEzlgEj2uQAsWfSZb8Uu0yuQUyJAG4odVkK6fv+z6/ur9RqyYN6dHLtU3pqTosRkB4JYAPAa5ciJ01mFQ1bRZbnoVXlUhr4sqe0wYZ2iRcRxlIQ9DMLi1DdiLogaGGm30= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758792317; c=relaxed/simple; bh=WIwi1Q5Ih8EETZG8HYgff8itSbuVENXHFclMfz2Q0a0=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=VzkxCG0GTagv2YbPAzHRbyLLKNp80WsNCYsJMXQHtYrS/x9xanXAEoZjL/S2TCoUC90ylDi9fZ5QWpk/fwjC7qAnLST7v7P5vK0x1ykm1DXs8FipRO+2rZdssCIZWkti8gmyMXkGFc7pcusVQtsMXMsYChWyt4TE6vbnq9xTTW8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Kc+BWUOO; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Kc+BWUOO" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4D3FCC4CEF0; Thu, 25 Sep 2025 09:25:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1758792316; bh=WIwi1Q5Ih8EETZG8HYgff8itSbuVENXHFclMfz2Q0a0=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=Kc+BWUOONeKOMbp62rKkiot7ahj8P6UpbtwZ0TF2ZJvuTZ09WTcGzhe0imI4bCMcu Dk4/32nx04Fd6SnBlz9BZQf0rHIOh+tSEo8n3t6Ceu13a24LlE+lHjUx1G10s6fEno jbRx7LcLVVLHIAGF+B/oZnpUfoGCHcr+6CyPpdDvj09RHJPoT7XSd+CMNL5v0mKAdq 46pdIVShhtI0n0hUAO65SUZBhaGb63ontPB9rxjowTRPRau+1PE6yj9VmqRkKojGT6 HF/QB/wX5U+SafTHrthx0A6t+utuJoV+/AMN7Ef3EVUk2MJpuxFo574gKJBjK0epdn ghaSeuEHEZuTw== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1v1iDx-00000009IVL-3Nku; Thu, 25 Sep 2025 09:25:13 +0000 Date: Thu, 25 Sep 2025 10:25:13 +0100 Message-ID: <868qi228au.wl-maz@kernel.org> From: Marc Zyngier To: Maximilian Dittgen Cc: , , , , , , Subject: Re: [PATCH] kvm, selftests: ioctl to handle MSIs injected from userspace as software-bypassing vLPIs In-Reply-To: <20250925090116.27575-1-mdittgen@amazon.de> References: <20250925090116.27575-1-mdittgen@amazon.de> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: mdittgen@amazon.de, oliver.upton@linux.dev, pbonzini@redhat.com, shuah@kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kselftest@vger.kernel.org, kvm@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Thu, 25 Sep 2025 10:01:16 +0100, Maximilian Dittgen wrote: > > From: Maximilian Dittgen > > At the moment, all MSIs injected from userspace using KVM_SIGNAL_MSI are > processed as LPIs in software with a hypervisor trap and exit. Not really. Injecting an interrupt preempts the guest injecting a host IPI, but there is no trap. > To > properly test GICv4 direct vLPI injection from KVM selftests, we write a > KVM_DEBUG_GIC_MSI_SETUP ioctl that manually creates an IRQ routing table > entry for the specified MSI, and populates ITS structures (device, > collection, and interrupt translation table entries) to map the MSI to a > vLPI. We then call GICv4 kvm_vgic_v4_set_forwarding to let the vLPI bypass > hypervisor traps and inject directly to the vCPU. I think that's totally overkill, and there is at least two ways to achieve the same thing without adding any additional code to the kernel: - your test can simulate the restore of a guest with pending interrupts in the in-memory tables, start it, see the expected interrupts in the guest. Additional benefit: you can now test LPI restore. - you use the interrupt injection mechanism that has been in the core code since 536e2e34bd0022, and let the GIC inject the interrupt for you. In case you wonder why it is there: for the exact purpose you describe. Thanks, M. -- Without deviation from the norm, progress is not possible.