From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 63CB056B66; Tue, 5 Dec 2023 11:53:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="O4bP9iWr" Received: by smtp.kernel.org (Postfix) with ESMTPSA id BB7FDC433C7; Tue, 5 Dec 2023 11:53:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1701777203; bh=3FNV8+wfCMDASEiBW/vL/W4Y2i6lE5IM3WZTeM1IX38=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=O4bP9iWrlyozBbKrXNsNhog3Mm9QqGvL9vfSwTty8f+HK+IC5/3D8E2aM/Tdp4kzy NWeGxw+QSlYt1fzPR33wtusXp9oTbILbXMoezjPO2xQCVnGHsdaQ03ZdAngDIEWXce WLr2K0335Z6bTbKyNwwWUnJ1K/yf2fEb2zC3tb1Wjo8b18Xqm40JYKZAdyOedeagM9 iWkgFDHgjzu+yV9WQQ/DFDlozYMo120D+b3gWvcPARB4SnGzeHR7caxwO7U6RJ9i1x ZhPMgMT/eFYurr3UXi3UueT15KP/69phPAoU0VZlDZd+bs3xj7Zv5AOTkcvBMe2UYQ kCKB0j2tBKCNw== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1rATzN-001XhJ-EX; Tue, 05 Dec 2023 11:53:21 +0000 Date: Tue, 05 Dec 2023 11:53:20 +0000 Message-ID: <86cyvkc1cf.wl-maz@kernel.org> From: Marc Zyngier To: Mark Rutland Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, Will Deacon , Catalin Marinas , Ard Biesheuvel , Anshuman Khandual , James Morse , Suzuki K Poulose , Oliver Upton , Zenghui Yu Subject: Re: [PATCH v3 0/3] arm64: Drop support for VPIPT i-cache policy In-Reply-To: References: <20231204143606.1806432-1-maz@kernel.org> <86h6kxbz8u.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: mark.rutland@arm.com, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, will@kernel.org, catalin.marinas@arm.com, ardb@kernel.org, anshuman.khandual@arm.com, james.morse@arm.com, suzuki.poulose@arm.com, oliver.upton@linux.dev, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Tue, 05 Dec 2023 11:03:16 +0000, Mark Rutland wrote: > > On Mon, Dec 04, 2023 at 06:26:25PM +0000, Marc Zyngier wrote: > > How about the patch below (tested in a guest with a bunch of hacks to > > expose different L1Ip values)? > > That's roughly what I was thinking; the diff looks good, minor comments below. > > [...] > > > /* > > * Whilst the D-side always behaves as PIPT on AArch64, aliasing is > > * permitted in the I-cache. > > */ > > static inline int icache_is_aliasing(void) > > { > > - return test_bit(ICACHEF_ALIASING, &__icache_flags); > > + return !cpus_have_cap(ARM64_ICACHE_PIPT); > > } > > It might be nicer to use alternative_has_cap_{likely,unlikely}(...) for > consistency with other cap checks, though that won't matter for hyp code and I > don't think the likely/unlikely part particularly matters either. Right, this should be marginally better. I was initially worried of the cap not being configured yet, but since we start by assuming VIPT and only flip to PIPT once we have seen all CPUs, this stays correct by construction. > [...] > > > diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg > > index c5af75b23187..db8c96841138 100644 > > --- a/arch/arm64/tools/sysreg > > +++ b/arch/arm64/tools/sysreg > > @@ -2003,7 +2003,7 @@ Field 28 IDC > > Field 27:24 CWG > > Field 23:20 ERG > > Field 19:16 DminLine > > -Enum 15:14 L1Ip > > +UnsignedEnum 15:14 L1Ip > > # This was named as VPIPT in the ARM but now documented as reserved > > 0b00 RESERVED_VPIPT > > # This is named as AIVIVT in the ARM but documented as reserved > > I was initially surprised by the use of UnsignedEnum, but given PIPT is 0b11, I > can see that works. Otherwise, we can keep this as an enum and use a helper > that checks for an exact match. Yeah, I hesitated either way, but maybe the helper approach is cleaner. I'll give it a go and repost this patch. Thanks, M. -- Without deviation from the norm, progress is not possible.