From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EF8FDC61DA4 for ; Wed, 22 Feb 2023 10:47:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230440AbjBVKrn (ORCPT ); Wed, 22 Feb 2023 05:47:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46924 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229615AbjBVKrl (ORCPT ); Wed, 22 Feb 2023 05:47:41 -0500 Received: from sin.source.kernel.org (sin.source.kernel.org [IPv6:2604:1380:40e1:4800::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8C10737F02 for ; Wed, 22 Feb 2023 02:47:40 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id D1D43CE1D53 for ; Wed, 22 Feb 2023 10:47:38 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2BEE8C433D2; Wed, 22 Feb 2023 10:47:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1677062857; bh=RxaCZgS3HlLRwESOI7a3H2MXN/i6tMp4RaaiUDcjBzw=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=dhV0YekXLHGEzUISBq07PKzIfXpZxbIv/7LT4M3v/XF237KCW+58WgpfLk/Wh/lxo CFrTbKoORVCLJ2mxHYTaxRIWf3TjFy0X1v3IudOfFvnMDZAjzLeJBo9L6YfsMwuYsi Qs6x5s0SartrL0Tb8TlG5yUIHpN4ozYG4JmVvGsSzg6ReRjGgj49Jks7OliB90mUG9 Z31QS6Ru+QtL/z584kMYFXTxt/DrnhDXWSZP/ETcv4B/w9xYv3HE2K0DU1gpyOH+Iv onHj9laIpHm6xDXIGHWPmrwgcXPotKxQQ61do7fT/hTQpzXrFdnGt1zSeNnpJb7wi1 4V7eA4Cmf+RrQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1pUmes-00CKWj-Se; Wed, 22 Feb 2023 10:47:34 +0000 Date: Wed, 22 Feb 2023 10:47:33 +0000 Message-ID: <86edqix9h6.wl-maz@kernel.org> From: Marc Zyngier To: Reiji Watanabe Cc: kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Suzuki K Poulose , Oliver Upton , Zenghui Yu , Ricardo Koller , Simon Veith , dwmw2@infradead.org Subject: Re: [PATCH 02/16] arm64: Add HAS_ECV_CNTPOFF capability In-Reply-To: References: <20230216142123.2638675-1-maz@kernel.org> <20230216142123.2638675-3-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: reijiw@google.com, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, james.morse@arm.com, suzuki.poulose@arm.com, oliver.upton@linux.dev, yuzenghui@huawei.com, ricarkol@google.com, sveith@amazon.de, dwmw2@infradead.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Wed, 22 Feb 2023 04:30:00 +0000, Reiji Watanabe wrote: > > Hi Marc, > > On Thu, Feb 16, 2023 at 6:21 AM Marc Zyngier wrote: > > > > Add the probing code for the FEAT_ECV variant that implements CNTPOFF_EL2. > > Why is it optional is a mystery, but let's try and detect it. > > > > Signed-off-by: Marc Zyngier > > --- > > arch/arm64/kernel/cpufeature.c | 11 +++++++++++ > > arch/arm64/tools/cpucaps | 1 + > > 2 files changed, 12 insertions(+) > > > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > > index 23bd2a926b74..36852f96898d 100644 > > --- a/arch/arm64/kernel/cpufeature.c > > +++ b/arch/arm64/kernel/cpufeature.c > > @@ -2186,6 +2186,17 @@ static const struct arm64_cpu_capabilities arm64_features[] = { > > .sign = FTR_UNSIGNED, > > .min_field_value = 1, > > }, > > + { > > + .desc = "Enhanced Counter Virtualization (CNTPOFF)", > > + .capability = ARM64_HAS_ECV_CNTPOFF, > > + .type = ARM64_CPUCAP_SYSTEM_FEATURE, > > + .matches = has_cpuid_feature, > > + .sys_reg = SYS_ID_AA64MMFR0_EL1, > > + .field_pos = ID_AA64MMFR0_EL1_ECV_SHIFT, > > + .field_width = 4, > > + .sign = FTR_UNSIGNED, > > + .min_field_value = 2, > > Nit: You might want to use ID_AA64MMFR0_EL1_ECV_CNTPOFF (instead of 2) ? Ah, of course! ;-) > Reviewed-by: Reiji Watanabe Thanks, M. -- Without deviation from the norm, progress is not possible.