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From: Marc Zyngier <maz@kernel.org>
To: Andre Przywara <andre.przywara@arm.com>
Cc: Julien Thierry <julien.thierry.kdev@gmail.com>,
	Will Deacon <will@kernel.org>,
	kvm@vger.kernel.org, kvmarm@lists.linux.dev,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Sascha Bischoff <sascha.bischoff@arm.com>
Subject: Re: [PATCH kvmtool v5 3/7] arm64: nested: Add support for setting maintenance IRQ
Date: Mon, 26 Jan 2026 18:03:54 +0000	[thread overview]
Message-ID: <86fr7sb69h.wl-maz@kernel.org> (raw)
In-Reply-To: <20260123142729.604737-4-andre.przywara@arm.com>

On Fri, 23 Jan 2026 14:27:25 +0000,
Andre Przywara <andre.przywara@arm.com> wrote:
> 
> Uses the new VGIC KVM device attribute to set the maintenance IRQ.
> This is fixed to use PPI 9, as a platform decision made by kvmtool,
> matching the SBSA recommendation.
> Use the opportunity to pass the kvm pointer to gic__generate_fdt_nodes(),
> as this simplifies the call and allows us access to the nested_virt
> config variable on the way.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  arm64/arm-cpu.c         |  2 +-
>  arm64/gic.c             | 29 +++++++++++++++++++++++++++--
>  arm64/include/kvm/gic.h |  2 +-
>  3 files changed, 29 insertions(+), 4 deletions(-)
> 
> diff --git a/arm64/arm-cpu.c b/arm64/arm-cpu.c
> index 69bb2cb2..0843ac05 100644
> --- a/arm64/arm-cpu.c
> +++ b/arm64/arm-cpu.c
> @@ -14,7 +14,7 @@ static void generate_fdt_nodes(void *fdt, struct kvm *kvm)
>  {
>  	int timer_interrupts[4] = {13, 14, 11, 10};
>  
> -	gic__generate_fdt_nodes(fdt, kvm->cfg.arch.irqchip);
> +	gic__generate_fdt_nodes(fdt, kvm);
>  	timer__generate_fdt_nodes(fdt, kvm, timer_interrupts);
>  	pmu__generate_fdt_nodes(fdt, kvm);
>  }
> diff --git a/arm64/gic.c b/arm64/gic.c
> index b0d3a1ab..2a595184 100644
> --- a/arm64/gic.c
> +++ b/arm64/gic.c
> @@ -11,6 +11,8 @@
>  
>  #define IRQCHIP_GIC 0
>  
> +#define GIC_MAINT_IRQ	9
> +
>  static int gic_fd = -1;
>  static u64 gic_redists_base;
>  static u64 gic_redists_size;
> @@ -302,10 +304,15 @@ static int gic__init_gic(struct kvm *kvm)
>  
>  	int lines = irq__get_nr_allocated_lines();
>  	u32 nr_irqs = ALIGN(lines, 32) + GIC_SPI_IRQ_BASE;
> +	u32 maint_irq = GIC_PPI_IRQ_BASE + GIC_MAINT_IRQ;
>  	struct kvm_device_attr nr_irqs_attr = {
>  		.group	= KVM_DEV_ARM_VGIC_GRP_NR_IRQS,
>  		.addr	= (u64)(unsigned long)&nr_irqs,
>  	};
> +	struct kvm_device_attr maint_irq_attr = {
> +		.group	= KVM_DEV_ARM_VGIC_GRP_MAINT_IRQ,
> +		.addr	= (u64)(unsigned long)&maint_irq,
> +	};
>  	struct kvm_device_attr vgic_init_attr = {
>  		.group	= KVM_DEV_ARM_VGIC_GRP_CTRL,
>  		.attr	= KVM_DEV_ARM_VGIC_CTRL_INIT,
> @@ -325,6 +332,16 @@ static int gic__init_gic(struct kvm *kvm)
>  			return ret;
>  	}
>  
> +	if (kvm->cfg.arch.nested_virt) {
> +		ret = ioctl(gic_fd, KVM_HAS_DEVICE_ATTR, &maint_irq_attr);
> +		if (!ret)
> +			ret = ioctl(gic_fd, KVM_SET_DEVICE_ATTR, &maint_irq_attr);
> +		if (ret) {
> +			pr_err("could not set maintenance IRQ\n");
> +			return ret;
> +		}
> +	}
> +
>  	irq__routing_init(kvm);
>  
>  	if (!ioctl(gic_fd, KVM_HAS_DEVICE_ATTR, &vgic_init_attr)) {
> @@ -342,7 +359,7 @@ static int gic__init_gic(struct kvm *kvm)
>  }
>  late_init(gic__init_gic)
>  
> -void gic__generate_fdt_nodes(void *fdt, enum irqchip_type type)
> +void gic__generate_fdt_nodes(void *fdt, struct kvm *kvm)
>  {
>  	const char *compatible, *msi_compatible = NULL;
>  	u64 msi_prop[2];
> @@ -350,8 +367,12 @@ void gic__generate_fdt_nodes(void *fdt, enum irqchip_type type)
>  		cpu_to_fdt64(ARM_GIC_DIST_BASE), cpu_to_fdt64(ARM_GIC_DIST_SIZE),
>  		0, 0,				/* to be filled */
>  	};
> +	u32 maint_irq[] = {
> +		cpu_to_fdt32(GIC_FDT_IRQ_TYPE_PPI), cpu_to_fdt32(GIC_MAINT_IRQ),
> +		gic__get_fdt_irq_cpumask(kvm) | IRQ_TYPE_LEVEL_HIGH
> +	};

This looks utterly broken, and my guests barf on this:

        intc {  
                compatible = "arm,gic-v3";
                #interrupt-cells = <0x03>;
                interrupt-controller;
                reg = <0x00 0x3fff0000 0x00 0x10000 0x00 0x3fef0000 0x00 0x100000>;
                interrupts = <0x01 0x09 0x4000000>;
                                        ^^^^^^^^^^^
Are you testing on a big-endian box??? I fixed it with the patchlet
below, but I also wonder why you added gic__get_fdt_irq_cpumask()...

	M.

diff --git a/arm64/gic.c b/arm64/gic.c
index 2a59518..640ff35 100644
--- a/arm64/gic.c
+++ b/arm64/gic.c
@@ -369,7 +369,7 @@ void gic__generate_fdt_nodes(void *fdt, struct kvm *kvm)
 	};
 	u32 maint_irq[] = {
 		cpu_to_fdt32(GIC_FDT_IRQ_TYPE_PPI), cpu_to_fdt32(GIC_MAINT_IRQ),
-		gic__get_fdt_irq_cpumask(kvm) | IRQ_TYPE_LEVEL_HIGH
+		cpu_to_fdt32(gic__get_fdt_irq_cpumask(kvm) | IRQ_TYPE_LEVEL_HIGH),
 	};
 
 	switch (kvm->cfg.arch.irqchip) {

-- 
Without deviation from the norm, progress is not possible.

  reply	other threads:[~2026-01-26 18:03 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-23 14:27 [PATCH kvmtool v5 0/7] arm64: Nested virtualization support Andre Przywara
2026-01-23 14:27 ` [PATCH kvmtool v5 1/7] Sync kernel UAPI headers with v6.19-rc6 Andre Przywara
2026-01-23 14:27 ` [PATCH kvmtool v5 2/7] arm64: Initial nested virt support Andre Przywara
2026-01-23 14:27 ` [PATCH kvmtool v5 3/7] arm64: nested: Add support for setting maintenance IRQ Andre Przywara
2026-01-26 18:03   ` Marc Zyngier [this message]
2026-01-27 12:07     ` Andre Przywara
2026-01-27 13:23       ` Sascha Bischoff
2026-01-29 17:08         ` Andre Przywara
2026-01-30  9:29           ` Sascha Bischoff
2026-02-02  8:54             ` Andre Przywara
2026-01-23 14:27 ` [PATCH kvmtool v5 4/7] arm64: Add counter offset control Andre Przywara
2026-01-23 14:27 ` [PATCH kvmtool v5 5/7] arm64: Add FEAT_E2H0 support Andre Przywara
2026-01-30  9:29   ` Sascha Bischoff
2026-01-23 14:27 ` [PATCH kvmtool v5 6/7] arm64: Generate HYP timer interrupt specifiers Andre Przywara
2026-01-23 14:27 ` [PATCH kvmtool v5 7/7] arm64: Handle virtio endianness reset when running nested Andre Przywara
2026-01-23 16:03   ` Marc Zyngier
2026-01-27 10:15     ` Sascha Bischoff
2026-02-09  2:21 ` [PATCH kvmtool v5 0/7] arm64: Nested virtualization support Itaru Kitayama

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