From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8B4F130D40B; Tue, 4 Aug 2026 15:16:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785856586; cv=none; b=Y/VVyU6TCCqhKVBnjackkU4OBi0deeguhb4AMTLlrTCqnobwGb0XRDi2pvct6jNGGZScXmGaKbtgqzX8b8SNkWIbdnROX7hTef5R9Gj0C/D0Eg4T5xm3EUbOfe83NaD3WZTdG9l1VIri4n51H8pAWNE9pDwD9uBF+ozisYAafQs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785856586; c=relaxed/simple; bh=XW4UhJwwZ32w6A5v+gluvdHrownap3EA5jXPN8zoYa4=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=r6Om5m/sy5b+227qpp0reWs6YIyqcYebSrYE3wNIkgcVylF7BbFkQDXDGWWkNym+neGOwps7fTwvv1ZBiVDBkcfZoHpP3IYa3DZomdREeypZjLUDnMZbbWaYa12vC1/KgLwYGzhickYhkN1iEsM8b1igshpqAyRolAlQZacW+Jo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=GLZl8Pc9; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="GLZl8Pc9" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 705751F000E9; Tue, 4 Aug 2026 15:16:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1785856585; bh=5bKVEcNFiFbLr1dxAdp9i5MeCT8J5gRCnSlut5TctaM=; h=Date:From:To:Cc:Subject:In-Reply-To:References; b=GLZl8Pc9AsSkRLZYTRt8E99d8OlNZ7RgOVfHiYonOUdCEovyjx1lDjeV7JfrL3csI 9wNQbKgovsfbtpsxo/IpKu1HfUDeWUWS6YieZn4r68x+j2aEpbSGWlO/uxaSf2sk3g VExXrqYkzICC3Xe+VEmzHc93BYv/yzXAGpmMbGHM9+ZBmB1gx0Ovp3SeW61a5Kn0qA OK/Kk9/4x2Vp7yjsApHxkdw/W2Esg/bMBSbgyrzqQoIn2RWwktzfbqXfUDOVtUiIui yIrDDbg/zP7OK+jkSvAmtN1M4ofLmypu8evk6/huXxlxevQrno29XpTcLeiUH+JiFw NRteEAT0I6Gwg== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wrGsR-0000000CGKT-2XG5; Tue, 04 Aug 2026 15:16:23 +0000 Date: Tue, 04 Aug 2026 16:16:23 +0100 Message-ID: <86h5l9c3w8.wl-maz@kernel.org> From: Marc Zyngier To: Joey Gouly Cc: kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Steffen Eiden , Suzuki K Poulose , Oliver Upton , Zenghui Yu , Hyunwoo Kim , stable@vger.kernel.org Subject: Re: [PATCH 3/6] KVM: arm64: Consider SCTLR_EL2.M when mapping the L1 VNCR page In-Reply-To: References: <20260801124818.366274-1-maz@kernel.org> <20260801124818.366274-4-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: joey.gouly@arm.com, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, seiden@linux.ibm.com, suzuki.poulose@arm.com, oupton@kernel.org, yuzenghui@huawei.com, imv4bel@gmail.com, stable@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Tue, 04 Aug 2026 12:03:31 +0100, Joey Gouly wrote: > > Hi Marc, > > Two small comments/suggestions. > > On Sat, Aug 01, 2026 at 01:48:15PM +0100, Marc Zyngier wrote: > > We record a VNCR TLB even when SCTLR_EL2.M is 0 in order to make > > our life easier. But this is not something that the architecture > > anticipate. > > > > As a consequence, a hypervisor is free to set VNCR_EL2 to > > some PA when SCTLR_EL2.M==0, use it to run a guest which indirectly > > accesses the VNCR page, then eventually set SCTLR_EL2.M==1 with > > the same VA. Yes, this is odd, but apparently legal. > > > > A common trick in HW is to invalidate the TLBs on SCTLR_ELx.M being > > flipped. But doing this is a not a good idea for us (we'd need to > > trap SCTLR accesses), and wouldn't scale as we nest deeper. > > > > Instead, use the fact that the S1 MMU being off at the point of > > translation is cached in our TLB, and simply ignore it if it > > doesn't match the current MMU state. > > Could you expand/change this a little, something like: > > Instead, use the fact that the S1 MMU being off at the point of > translation is cached in our VNCR TLB, and if it doesn't match > the current MMU state, leave the VNCR unmapped. > Yup, that reads better. Thanks. > > > > Fixes: 2a359e072596f ("KVM: arm64: nv: Handle mapping of VNCR_EL2 at EL2") > > Signed-off-by: Marc Zyngier > > Cc: stable@vger.kernel.org > > --- > > arch/arm64/include/asm/kvm_nested.h | 7 +++++++ > > arch/arm64/kvm/at.c | 2 -- > > arch/arm64/kvm/nested.c | 3 +++ > > 3 files changed, 10 insertions(+), 2 deletions(-) > > > > diff --git a/arch/arm64/include/asm/kvm_nested.h b/arch/arm64/include/asm/kvm_nested.h > > index 012d711034d17..cc48817a5bf7a 100644 > > --- a/arch/arm64/include/asm/kvm_nested.h > > +++ b/arch/arm64/include/asm/kvm_nested.h > > @@ -388,6 +388,8 @@ struct s1_walk_result { > > bool failed; > > }; > > > > +#define S1_MMU_DISABLED (-127) > > + > > static inline void fail_s1_walk(struct s1_walk_result *wr, u8 fst, bool s1ptw) > > { > > wr->fst = fst; > > @@ -396,6 +398,11 @@ static inline void fail_s1_walk(struct s1_walk_result *wr, u8 fst, bool s1ptw) > > wr->failed = true; > > } > > > > +static inline bool s1_mmu_disabled(struct s1_walk_result *wr) > > +{ > > + return wr->level == S1_MMU_DISABLED; > > +} > > + > > int __kvm_translate_va(struct kvm_vcpu *vcpu, struct s1_walk_info *wi, > > struct s1_walk_result *wr, u64 va); > > int __kvm_find_s1_desc_level(struct kvm_vcpu *vcpu, u64 va, u64 ipa, > > diff --git a/arch/arm64/kvm/at.c b/arch/arm64/kvm/at.c > > index 640f2dc00a8ba..0926426b87989 100644 > > --- a/arch/arm64/kvm/at.c > > +++ b/arch/arm64/kvm/at.c > > @@ -11,8 +11,6 @@ > > #include > > #include > > > > -#define S1_MMU_DISABLED (-127) > > - > > static int get_ia_size(struct s1_walk_info *wi) > > { > > return 64 - wi->txsz; > > diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c > > index 035cda256e2a5..d7dba02dc84fe 100644 > > --- a/arch/arm64/kvm/nested.c > > +++ b/arch/arm64/kvm/nested.c > > @@ -1578,6 +1578,9 @@ static void kvm_map_l1_vncr(struct kvm_vcpu *vcpu) > > if (!vt->valid) > > return; > > > > + if (!(vcpu_read_sys_reg(vcpu, SCTLR_EL2) & SCTLR_ELx_M) != s1_mmu_disabled(&vt->wr)) > > + return; > > A comment here would also be useful for future archaeology (also current > reading since the !( .. != ) code is confusing). > > Or maybe: > > bool mmu_disabled_sctlr = vcpu_read_sys_reg(vcpu, SCTLR_EL2) & SCTLR_ELx_M) == 0; > if (mmu_disabled_sctlr != s1_mmu_disabled(&vt->wr)) And maybe using positive logic? I'll see what I can do. Thanks, M. -- Without deviation from the norm, progress is not possible.