From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 970C019A2B7; Thu, 5 Sep 2024 14:57:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725548238; cv=none; b=B5GbsCXxVsemFnAbE1zTPKFq/IwCO3r88m0U61ovMd0K6QIFZG5aAOFy3g8UCgrFaivYFtYkATQiEO/Myw/Sk/PXWjb4vHe4TDJCsZZGpdddsLyt8j66i/fCB82NuPhgKGwZFZ0r6YCQGkPH34nSp5Gd2mK2jK2jSv0aXR1+hJ4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725548238; c=relaxed/simple; bh=KAHi3umxUR4oy96Bn7I3kG7qlY5Uqzhzj0ufsrwwPRA=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=Q0NY5Xg+rFtUH8VT/iMWZ44vWbe3I7Yn4ECjL4oD1ZHaFmzVTkHEUqfKekYUcSze6FJ3Q9lVMbMIRQ/swj5l9bSWXPsQBfQ4tTJMywCLrmnl/ccm8dYAY2bPB1snyWihhNYQqAl65OI6vBEHJNHUGblffO30XHHvvejmIrh8L4E= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=MdMAbHlu; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="MdMAbHlu" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1C0A3C4CECB; Thu, 5 Sep 2024 14:57:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1725548238; bh=KAHi3umxUR4oy96Bn7I3kG7qlY5Uqzhzj0ufsrwwPRA=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=MdMAbHlumLZf52D59lasIUksNWhnyWNNT3REL5qMUhs4Nn30USb1tTXrki98khANW suzL5zOptzsWiEul+DcEFVNwPZREgLSBNoGhYjpWtdb08YEQc2444oQ/BYA3wCG4Uj AftAJzNUu0vli8PVoPp81kBHkDsIMF0bVUZHQkGiu3iTmJAG+ssxjcK40Q4EMRW6rq oUcaVSoCN8Rc7KxG/iokcR8OaIXYyEo+erAbYrJlYgMy1M4mfywMsR9/RzjqecbsLu m63CyWq7NBmkeiux+/abXF5HX6OLeqHFXachfWMqzf+qg2UllC8JRfjT6zDek3/Ara yA5PtnwBX58Dg== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1smDv8-009zQN-DJ; Thu, 05 Sep 2024 15:57:15 +0100 Date: Thu, 05 Sep 2024 15:57:13 +0100 Message-ID: <86ikvaup12.wl-maz@kernel.org> From: Marc Zyngier To: Joey Gouly Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, James Morse , Suzuki K Poulose , Oliver Upton , Zenghui Yu , Alexandru Elisei , Mark Brown Subject: Re: [PATCH v2 12/16] KVM: arm64: Implement AT S1PIE support In-Reply-To: <20240905135820.GA4142389@e124191.cambridge.arm.com> References: <20240903153834.1909472-1-maz@kernel.org> <20240903153834.1909472-13-maz@kernel.org> <20240905135820.GA4142389@e124191.cambridge.arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: joey.gouly@arm.com, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, james.morse@arm.com, suzuki.poulose@arm.com, oliver.upton@linux.dev, yuzenghui@huawei.com, alexandru.elisei@arm.com, broonie@kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Hi Joey, Thanks for having a look. On Thu, 05 Sep 2024 14:58:20 +0100, Joey Gouly wrote: > > Hello Marc! > > > static void compute_s1_permissions(struct kvm_vcpu *vcpu, u32 op, > > struct s1_walk_info *wi, > > struct s1_walk_result *wr, > > struct s1_perms *s1p) > > { > > - compute_s1_direct_permissions(vcpu, wi, wr, s1p); > > + if (!s1pie_enabled(vcpu, wi->regime)) > > + compute_s1_direct_permissions(vcpu, wi, wr, s1p); > > + else > > + compute_s1_indirect_permissions(vcpu, wi, wr, s1p); > > + > > compute_s1_hierarchical_permissions(vcpu, wi, wr, s1p); > > Is this (and the previous patch to split this up) right? > > Looking at this from the ARM ARM (ARM DDI 0487K.a): > > R JHSVW If Indirect permissions are used, then hierarchical > permissions are disabled and TCR_ELx.HPDn are RES 1. Odd. I was convinced that it was when S1POE is enabled that HPs were disabled. But you are absolutely right, and it is once more proven that I can't read. Oh well. Not to worry, I've since found other issues with this series. I have forgotten the patch dealing with the fast path on another branch, and since decided that TCR2_EL2 needed extra care to cope with individual features being disabled. The rework is still useful, as I'm looking at POE as well, but I need to hoist the HP stuff up a notch. I'll repost things once I've sorted these things up. Thanks again, M. -- Without deviation from the norm, progress is not possible.