From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A47AA1B7913; Wed, 21 Aug 2024 11:14:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724238840; cv=none; b=oCnZR8Jbati33LUbUvYiojik0IpUjpRORK0QAWoP62yS6ymL+eRNzlXxkSn7ShOqBQ5QDh8C34eIT1szaENbkI0Xx6N/A9DtXV1ED8KffZnFaSdbSR85gMbsnlUAmiDI6zkVtY7wB6ysssixH17sEsqcELpz65KGHI4iYlVSwzc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724238840; c=relaxed/simple; bh=ltZxB1ov+Y4a3/+KK1P2wxvY2WYfLUrfItKSecJnu9c=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=m4w/xWebHsym9pqNCUfSkvKHLUyYgmTk/WwvDeS6GkzT+8xQWeLk/MUI8JUpuetX2AlnWpvkTE2jqHU2WL9+g5LQzI0Ij8lSX09A4nxc+Ti5sYhV/2mcl8L34YYASmbSJRcvBHGJRrUjVa5qfWGtggTfk30ZiUTaMsiKTr7qmyc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=QP5H6CuX; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="QP5H6CuX" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 240F1C32782; Wed, 21 Aug 2024 11:14:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1724238840; bh=ltZxB1ov+Y4a3/+KK1P2wxvY2WYfLUrfItKSecJnu9c=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=QP5H6CuXkR6voKv0xKrbGXHYzT17/dj688f7YYjoSxC0YZuVsJgzoHlNAtO5FxydI HJrMQ2X4Ja08uH65aGI8YSzooKxgKJUXxScKCNSWooXnXXx+oPxr4PnJ7VYol5/Wkm FpBO0NXoCZPSn+QKV4jCXaxKxSWpm6H6ANKFCDtqCHe/P4BG8MDuJy2ysBuzIwzEuQ tT3GOePu0sK/Ag7sGMl4kmLb4CNTtgZ/YQc/+ugkX58AJuEB+IMASjm+3n0aQf3wC2 9zYnKXDFn6NIwPCqPkn0hauuF6ibjVb0aDVfX0PGbjl/NFCkA50IU9drShtm49Nhnn GGF6Ch2b01EOg== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1sgjHp-005Yem-R6; Wed, 21 Aug 2024 12:13:57 +0100 Date: Wed, 21 Aug 2024 12:13:57 +0100 Message-ID: <86ikvuxh56.wl-maz@kernel.org> From: Marc Zyngier To: Oliver Upton Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu , Alexander Potapenko Subject: Re: [PATCH 04/12] KVM: arm64: Force GICv3 traps activa when no irqchip is configured on VHE In-Reply-To: References: <20240820100349.3544850-1-maz@kernel.org> <20240820100349.3544850-5-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: oliver.upton@linux.dev, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, james.morse@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, glider@google.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Wed, 21 Aug 2024 00:33:40 +0100, Oliver Upton wrote: > > s/activa/active/ > > On Tue, Aug 20, 2024 at 11:03:41AM +0100, Marc Zyngier wrote: > > On a VHE system, no GICv3 traps get configured when no irqchip is > > present. This is not quite matching the "no GICv3" semantics that > > we want to present. > > > > Force such traps to be configured in this case. > > > > Signed-off-by: Marc Zyngier > > --- > > arch/arm64/kvm/vgic/vgic.c | 14 ++++++++++---- > > 1 file changed, 10 insertions(+), 4 deletions(-) > > > > diff --git a/arch/arm64/kvm/vgic/vgic.c b/arch/arm64/kvm/vgic/vgic.c > > index 974849ea7101..2caa64415ff3 100644 > > --- a/arch/arm64/kvm/vgic/vgic.c > > +++ b/arch/arm64/kvm/vgic/vgic.c > > @@ -917,10 +917,13 @@ void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu) > > > > void kvm_vgic_load(struct kvm_vcpu *vcpu) > > { > > - if (unlikely(!vgic_initialized(vcpu->kvm))) > > + if (unlikely(!irqchip_in_kernel(vcpu->kvm) || !vgic_initialized(vcpu->kvm))) { > > Doesn't !vgic_initialized(vcpu->kvm) also cover the case of no irqchip > in kernel? It does, but that's purely accidental. I can drop that, but it is really fragile. Thanks, M. -- Without deviation from the norm, progress is not possible.