From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A7B0EB64DA for ; Fri, 14 Jul 2023 10:11:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235943AbjGNKLG (ORCPT ); Fri, 14 Jul 2023 06:11:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55544 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236042AbjGNKLC (ORCPT ); Fri, 14 Jul 2023 06:11:02 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 644D1359B for ; Fri, 14 Jul 2023 03:10:58 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 3641461CD8 for ; Fri, 14 Jul 2023 10:10:57 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 93D39C433C8; Fri, 14 Jul 2023 10:10:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1689329456; bh=+/1In3CXHwiwXI4REHPVuSWLDLkcJnvdHWDtDgrkD88=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=BKSJupn7Q3v9eo27uP9DJOXtii0v/GcYQJ5Y/fyXiB/c/dgVb/yAilbRajbnIW/RE EABJGGY4DFDUYSyB3s2je2tDWfvKhyGcH9Gs02hHCq4YUsQD7MplUqfdw2WuUFUsVk bvMc2LnZfXuTBTfh03RQD8cVZ6Ww2Y5aPUG/jTHYZQYyF6qkEXZrkELdM15vY4l/H0 pT6+L8D4ozKC3JD3f5X1Ggm9lH7czirS7SBVciYZiP6x1JXnX0ga9lq2jbYkdl4DzR dBDucakasgdhGnJ0JN2ECn8Ak512oJOV7Mg8m583QbRqKv3Lw+wl4JGkXUgYDjeJ5W ymfdBGR9js7lQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1qKFlF-00D4U3-Sn; Fri, 14 Jul 2023 11:10:54 +0100 Date: Fri, 14 Jul 2023 11:10:53 +0100 Message-ID: <86ilamvm4y.wl-maz@kernel.org> From: Marc Zyngier To: eric.auger@redhat.com Cc: kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Catalin Marinas , Mark Brown , Mark Rutland , Will Deacon , Alexandru Elisei , Andre Przywara , Chase Conklin , Ganapatrao Kulkarni , Darren Hart , Miguel Luis , James Morse , Suzuki K Poulose , Oliver Upton , Zenghui Yu Subject: Re: [PATCH 16/27] KVM: arm64: nv: Add trap forwarding for HCR_EL2 In-Reply-To: <86sf9rvmd7.wl-maz@kernel.org> References: <20230712145810.3864793-1-maz@kernel.org> <20230712145810.3864793-17-maz@kernel.org> <8c32ebdc-a3bc-aabe-5098-3754159d22cd@redhat.com> <86sf9rvmd7.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: eric.auger@redhat.com, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com, broonie@kernel.org, mark.rutland@arm.com, will@kernel.org, alexandru.elisei@arm.com, andre.przywara@arm.com, chase.conklin@arm.com, gankulkarni@os.amperecomputing.com, darren@os.amperecomputing.com, miguel.luis@oracle.com, james.morse@arm.com, suzuki.poulose@arm.com, oliver.upton@linux.dev, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Thu, 13 Jul 2023 16:53:40 +0100, Marc Zyngier wrote: > > Hey Eric, > > Thanks for looking into this, much appreciated given how tedious it > is. FWIW, here are the changes I'm going to squash in that patch. Shout if you spot something that looks odd... Thanks, M. diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-nested.c index c4057f4ff72d..f5978b463aca 100644 --- a/arch/arm64/kvm/emulate-nested.c +++ b/arch/arm64/kvm/emulate-nested.c @@ -55,7 +55,8 @@ enum coarse_grain_trap_id { CGT_HCR_TERR, CGT_HCR_APK, CGT_HCR_NV, - CGT_HCR_NV1, + CGT_HCR_NV_nNV2, + CGT_HCR_NV1_nNV2, CGT_HCR_AT, CGT_HCR_FIEN, CGT_HCR_TID4, @@ -89,7 +90,7 @@ enum coarse_grain_trap_id { CGT_HCR_TVM_TRVM, CGT_HCR_TPU_TICAB, CGT_HCR_TPU_TOCU, - CGT_HCR_NV1_ENSCXT, + CGT_HCR_NV1_nNV2_ENSCXT, CGT_MDCR_TPM_TPMCR, CGT_MDCR_TDE_TDA, CGT_MDCR_TDE_TDOSA, @@ -154,7 +155,7 @@ static const struct trap_bits coarse_trap_bits[] = { .mask = HCR_TSW, .behaviour = BEHAVE_FORWARD_ANY, }, - [CGT_HCR_TPC] = { + [CGT_HCR_TPC] = { /* Also called TCPC when FEAT_DPB is implemented */ .index = HCR_EL2, .value = HCR_TPC, .mask = HCR_TPC, @@ -176,7 +177,7 @@ static const struct trap_bits coarse_trap_bits[] = { .index = HCR_EL2, .value = HCR_TVM, .mask = HCR_TVM, - .behaviour = BEHAVE_FORWARD_ANY, + .behaviour = BEHAVE_FORWARD_WRITE, }, [CGT_HCR_TDZ] = { .index = HCR_EL2, @@ -209,12 +210,18 @@ static const struct trap_bits coarse_trap_bits[] = { .behaviour = BEHAVE_FORWARD_ANY, }, [CGT_HCR_NV] = { + .index = HCR_EL2, + .value = HCR_NV, + .mask = HCR_NV, + .behaviour = BEHAVE_FORWARD_ANY, + }, + [CGT_HCR_NV_nNV2] = { .index = HCR_EL2, .value = HCR_NV, .mask = HCR_NV | HCR_NV2, .behaviour = BEHAVE_FORWARD_ANY, }, - [CGT_HCR_NV1] = { + [CGT_HCR_NV1_nNV2] = { .index = HCR_EL2, .value = HCR_NV | HCR_NV1, .mask = HCR_NV | HCR_NV1 | HCR_NV2, @@ -350,7 +357,7 @@ static const enum coarse_grain_trap_id *coarse_control_combo[] = { MCB(CGT_HCR_TVM_TRVM, CGT_HCR_TVM, CGT_HCR_TRVM), MCB(CGT_HCR_TPU_TICAB, CGT_HCR_TPU, CGT_HCR_TICAB), MCB(CGT_HCR_TPU_TOCU, CGT_HCR_TPU, CGT_HCR_TOCU), - MCB(CGT_HCR_NV1_ENSCXT, CGT_HCR_NV1, CGT_HCR_ENSCXT), + MCB(CGT_HCR_NV1_nNV2_ENSCXT, CGT_HCR_NV1_nNV2, CGT_HCR_ENSCXT), MCB(CGT_MDCR_TPM_TPMCR, CGT_MDCR_TPM, CGT_MDCR_TPMCR), MCB(CGT_MDCR_TDE_TDA, CGT_MDCR_TDE, CGT_MDCR_TDA), MCB(CGT_MDCR_TDE_TDOSA, CGT_MDCR_TDE, CGT_MDCR_TDOSA), @@ -501,6 +508,7 @@ static const struct encoding_to_trap_config encoding_to_cgt[] __initdata = { SR_TRAP(SYS_DC_CIVAC, CGT_HCR_TPC), SR_TRAP(SYS_DC_CVAC, CGT_HCR_TPC), SR_TRAP(SYS_DC_CVAP, CGT_HCR_TPC), + SR_TRAP(SYS_DC_CVADP, CGT_HCR_TPC), SR_TRAP(SYS_DC_IVAC, CGT_HCR_TPC), SR_TRAP(SYS_DC_CIGVAC, CGT_HCR_TPC), SR_TRAP(SYS_DC_CIGDVAC, CGT_HCR_TPC), @@ -625,7 +633,6 @@ static const struct encoding_to_trap_config encoding_to_cgt[] __initdata = { sys_reg(3, 5, 10, 15, 7), CGT_HCR_NV), SR_RANGE_TRAP(sys_reg(3, 5, 12, 0, 0), sys_reg(3, 5, 14, 15, 7), CGT_HCR_NV), - SR_TRAP(SYS_SP_EL1, CGT_HCR_NV), SR_TRAP(OP_AT_S1E2R, CGT_HCR_NV), SR_TRAP(OP_AT_S1E2W, CGT_HCR_NV), SR_TRAP(OP_AT_S12E1R, CGT_HCR_NV), @@ -698,10 +705,14 @@ static const struct encoding_to_trap_config encoding_to_cgt[] __initdata = { SR_TRAP(OP_TLBI_RIPAS2LE1OSNXS, CGT_HCR_NV), SR_TRAP(OP_TLBI_RVAE2OSNXS, CGT_HCR_NV), SR_TRAP(OP_TLBI_RVALE2OSNXS, CGT_HCR_NV), - SR_TRAP(SYS_VBAR_EL1, CGT_HCR_NV1), - SR_TRAP(SYS_ELR_EL1, CGT_HCR_NV1), - SR_TRAP(SYS_SPSR_EL1, CGT_HCR_NV1), - SR_TRAP(SYS_SCXTNUM_EL1, CGT_HCR_NV1_ENSCXT), + SR_TRAP(OP_CPP_RCTX, CGT_HCR_NV), + SR_TRAP(OP_DVP_RCTX, CGT_HCR_NV), + SR_TRAP(OP_CFP_RCTX, CGT_HCR_NV), + SR_TRAP(SYS_SP_EL1, CGT_HCR_NV_nNV2), + SR_TRAP(SYS_VBAR_EL1, CGT_HCR_NV1_nNV2), + SR_TRAP(SYS_ELR_EL1, CGT_HCR_NV1_nNV2), + SR_TRAP(SYS_SPSR_EL1, CGT_HCR_NV1_nNV2), + SR_TRAP(SYS_SCXTNUM_EL1, CGT_HCR_NV1_nNV2_ENSCXT), SR_TRAP(SYS_SCXTNUM_EL0, CGT_HCR_ENSCXT), SR_TRAP(OP_AT_S1E1R, CGT_HCR_AT), SR_TRAP(OP_AT_S1E1W, CGT_HCR_AT), -- Without deviation from the norm, progress is not possible.