From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9D2451BDA89; Fri, 16 Aug 2024 13:45:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723815901; cv=none; b=lZduBM9sJNJ2ISpHNslvps6Et5jtvjVmTK60W1QR1DTKjk+sIS+1D9cOMKNIZY5KBup2SBVNmEsGhVsj5VF+im7T4fKWEALiAO+L6pyPGQgVgyQSYrOQOMeNUfSOBE0pZVuWR57SkKPtoq8PIVP52I2wFVxeDic17IYVw7FER2c= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723815901; c=relaxed/simple; bh=YQT8ZDRJOg8IW7UFAymgBTObemrs1T7N8zH4s23+HPk=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=aZJprsG53t9nH/58HlIsRn6PYrxOYD27vGAFSoaUrONAYfbi9dy72laC/oF2IeVmJWVkDf/X9xyVpcH8UnYQnB3lH7cTWmOE9Sz5Mxf38q6lOMLR20SKkwTJ3ED9xkcaThL+fwge1830a6D399Q0R7+Uh9ItZHiepFrGbh9ApBs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=X8pjbaC2; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="X8pjbaC2" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7C322C4AF0C; Fri, 16 Aug 2024 13:45:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1723815901; bh=YQT8ZDRJOg8IW7UFAymgBTObemrs1T7N8zH4s23+HPk=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=X8pjbaC2F/ylOjRoBQrUnbKG7P1R3Q5ZbhpjbLNcy+SInKZNi9wdIIMQ0Vi1UzKFS ZqkC57XGsnaszGg5iTu6CYosPBMaiC+IuO/8UNVIBY4G2dUoLBu5uhDKkbZle4HuIa kN9b/6+InTLntdr6WUWAtoe1ghjNvwSXNEXluYT971G9d9XrukQ1tLbD5EyWiCMBMt 5RUhAymAi5rtFX11Iv4BnpI37/rjmrX0uxn+TUdl1/1d3KujHjCZ9OJABjQCvz/mCA QT5qwO1q8HCSQ1JRwokdGqQMVCp/fcva8HwhmwTKKCZNYFtZ4JptJpVspE1Nc1u3/p pmi4J5w4XhmnA== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1sexGF-004Hra-84; Fri, 16 Aug 2024 14:44:59 +0100 Date: Fri, 16 Aug 2024 14:44:58 +0100 Message-ID: <86jzggzin9.wl-maz@kernel.org> From: Marc Zyngier To: Alexandru Elisei Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, James Morse , Suzuki K Poulose , Oliver Upton , Zenghui Yu , Joey Gouly , Anshuman Khandual , Przemyslaw Gaj Subject: Re: [PATCH v3 14/18] KVM: arm64: nv: Add SW walker for AT S1 emulation In-Reply-To: References: <20240813100540.1955263-1-maz@kernel.org> <20240813100540.1955263-15-maz@kernel.org> <86msldzlly.wl-maz@kernel.org> <86le0wzrbv.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: alexandru.elisei@arm.com, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, james.morse@arm.com, suzuki.poulose@arm.com, oliver.upton@linux.dev, yuzenghui@huawei.com, joey.gouly@arm.com, anshuman.khandual@arm.com, pgaj@cadence.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Fri, 16 Aug 2024 12:02:37 +0100, Alexandru Elisei wrote: > > Hi Marc, > > On Fri, Aug 16, 2024 at 11:37:24AM +0100, Marc Zyngier wrote: > > Hi Alex, > > > > On Fri, 16 Aug 2024 10:22:43 +0100, > > Alexandru Elisei wrote: > > > > > > Hi Marc, > > > > > > On Thu, Aug 15, 2024 at 07:28:41PM +0100, Marc Zyngier wrote: > > > > > > > > Hi Alex, > > > > > > > > On Thu, 15 Aug 2024 17:44:02 +0100, > > > > Alexandru Elisei wrote: > > > > [...] > > > > > > > > +static bool par_check_s1_perm_fault(u64 par) > > > > > > +{ > > > > > > + u8 fst = FIELD_GET(SYS_PAR_EL1_FST, par); > > > > > > + > > > > > > + return ((fst & ESR_ELx_FSC_TYPE) == ESR_ELx_FSC_PERM && > > > > > > + !(par & SYS_PAR_EL1_S)); > > > > > > > > > > ESR_ELx_FSC_PERM = 0x0c is a permission fault, level 0, which Arm ARM says can > > > > > only happen when FEAT_LPA2. I think the code should check that the value for > > > > > PAR_EL1.FST is in the interval (ESR_ELx_FSC_PERM_L(0), ESR_ELx_FSC_PERM_L(3)]. > > > > > > > > I honestly don't want to second-guess the HW. If it reports something > > > > that is the wrong level, why should we trust the FSC at all? > > > > > > Sorry, I should have been clearer. > > > > > > It's not about the hardware reporting a fault on level 0 of the translation > > > tables, it's about the function returning false if the hardware reports a > > > permission fault on levels 1, 2 or 3 of the translation tables. > > > > > > For example, on a permssion fault on level 3, PAR_EL1. FST = 0b001111 = 0x0F, > > > which means that the condition: > > > > > > (fst & ESR_ELx_FSC_TYPE) == ESR_ELx_FSC_PERM (which is 0x0C) is false and KVM > > > will fall back to the software walker. > > > > > > Does that make sense to you? > > > > I'm afraid I still don't get it. > > > > From the kernel source: > > > > #define ESR_ELx_FSC_TYPE (0x3C) > > > > This is a mask covering all fault types. > > > > #define ESR_ELx_FSC_PERM (0x0C) > > > > This is the value for a permission fault, not encoding a level. > > > > Taking your example: > > > > (fst & ESR_ELx_FSC_TYPE) == (0x0F & 0x3C) == 0x0C == ESR_ELx_FSC_PERM > > > > As I read it, the condition is true, as it catches a permission fault > > on any level between 0 and 3. > > > > You're obviously seeing something I don't, and I'm starting to > > question my own sanity... > > No, no, sorry for leading you on a wild goose chase, I read 0x3F for > ESR_ELx_FSC_TYPE, which the value for the variable directly above it, instead of > 0x3C :( > > My bad, the code is correct! Ah, glad we agree, I was starting to worry! Thanks, M. -- Without deviation from the norm, progress is not possible.