From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E5422D3EC1; Thu, 21 May 2026 06:21:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779344506; cv=none; b=DEBbbNEdCL6SDAi5T6jTdEZu2B3sIkMi/ccXVCoHCW7OWgEON9SLpB2gTYdEnWmJB37wLuhDW7a8tJa0lVsGex+XOMxJcsr+u7srKcCG6egznAqh9vm9zvDLBp2n042aI0rRYOyeFnSsrioF2lHkY1Dr7hZM13eS9zd8Cfax41s= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779344506; c=relaxed/simple; bh=r45PBvdII2o5mYfP5ql8XTDyzdb2YZJ8o9nY77e9SnU=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=CpzsXwcaQqOvBzfW6BWN9YuM4Gad9oltshw7HUni1Lp3Jx1GuNJISPdvKmQnhZVykBiexU85nghIrguNhTcCUEDzm4p10fy7VzUG1ziZQmQs3PCAKRVN/WDKCuMu6bh7uWOthL6ta9iYlZY/CCyMsJYRRRrdQte9Js+y0OxNykg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=oOFnhiY0; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="oOFnhiY0" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D68881F000E9; Thu, 21 May 2026 06:21:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1779344504; bh=DzO2aEKL0eYNvitD1/FUOoxkL7f0cNoROoGQTff0vjI=; h=Date:From:To:Cc:Subject:In-Reply-To:References; b=oOFnhiY0OA6iK4nU4eLBD1+04a1igf9LpYBf/5pJQoVIOa7dGcdZHJrtES3onkTKF 4AKb1rYY71HSGuAmchP5NTIpIL/YNbYiZppKOL99kt5jyHrvO+YvahKlv1LFI7qa+s kJ6urXk9hIeyi1dVpmoogb84gUvGOfRDN5n9b0pAf9R/IlizXCghFFM6TIgs634M/C xssAL3NANmNmdfp7YIhi1mbXGV9ebyJLdo9+Jv7r4RQvIvHluslf2rSkSt3fZLWDUf Me/FnSal5ZeIuzNiz/NUA7spwbAt0JsCiKrEtDEsYjTeRoOagQtjBg20dCCDXVkJ1x uTk6BBS5dVLVg== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wPwms-00000004gLC-1AqW; Thu, 21 May 2026 06:21:42 +0000 Date: Thu, 21 May 2026 07:21:41 +0100 Message-ID: <86o6i9wadm.wl-maz@kernel.org> From: Marc Zyngier To: Joey Gouly Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, Steffen Eiden , Suzuki K Poulose , Oliver Upton , Zenghui Yu , Mark Rutland , Will Deacon , Fuad Tabba Subject: Re: [PATCH v2 2/2] KVM: arm64: nv: Don't save/restore FP register during a nested ERET or exception In-Reply-To: <20260520110231.GA4005903@e124191.cambridge.arm.com> References: <20260520085036.541666-1-maz@kernel.org> <20260520085036.541666-3-maz@kernel.org> <20260520110231.GA4005903@e124191.cambridge.arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: joey.gouly@arm.com, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, seiden@linux.ibm.com, suzuki.poulose@arm.com, oupton@kernel.org, yuzenghui@huawei.com, mark.rutland@arm.com, will@kernel.org, tabba@google.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Wed, 20 May 2026 12:02:31 +0100, Joey Gouly wrote: > > Hi Marc, > > On Wed, May 20, 2026 at 09:50:36AM +0100, Marc Zyngier wrote: > > When switching between L1 and L2, we save the old state using > > kvm_arch_vcpu_put(), mutate the state in memory, then load the new > > state using kvm_arch_vcpu_load(). Any live FPSIMD/SVE state is saved > > and unbound, such that it can be lazily restored on a subsequent trap. > > > > The FPSIMD/SVE state is shared by exception levels, and only a handful > > of related control registers need to be changed when transitioning > > between L1 and L2. The save/restore of the common state is needless > > overhead, especially as trapping becomes exponentially more expensive > > with nesting. > > > > Avoid this overhead by leaving the common FPSIMD/SVE state live on the > > CPU, and only switching the state that is distinct for L1 and L2: > > To make sure I understand this part: > > L1 sets up L2's FP state live on the CPU > L1 erets > eret traps to L0/host > preemption disabled > kvm_arch_vcpu_put() > kvm_arch_vcpu_put_fp() <-- actually saves the state of the live registers > .. set elr etc .. > kvm_arch_vcpu_load() > kvm_arch_vcpu_load_fp() <-- doesn't actually restore state, but ensures > the CPTR trap will be set > .. returns to L2 (traps on first use of FP and state will be restored) > > So this patch is (effectively) removing the put_fp()/load_fp(), because the FP > state is common/shared between L1 and L2, so whatever L1 put into that state > before the eret, L2 was going to see. Yes, you got it right. The other path is on L1 to L2 exception, which also requires L0 mediation and has a similar shape. The most horrible thing is that because all these traps can happen at a arbitrary depth, each individual trap usually results in the combination of all of the above. > If my understanding is correct: > Reviewed-by: Joey Gouly Thanks! M. -- Without deviation from the norm, progress is not possible.