From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B90EE18C05; Fri, 14 Jun 2024 13:20:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718371257; cv=none; b=NyIdR25n9Iy9+Ruuc3meEJGtg2bdao2cByjFTwM/jpRlCZrBy+OfvcdmcRRbO9WY1faGiewNqfDL6IrOYXjmxrxjKK4jFp9BxCojyRn4TOh93105xn7bmaGf9f9juK/7PYjR2ZKnz3b9sbg03KapRqEGlXGtqZecvvrc+tG1fH8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718371257; c=relaxed/simple; bh=0OIRru52fRlzhCGs2tHFFXy/+aeZhVjWXO72oWyFPUA=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=VxPRJ4qi/whKDyUN+Dx15IwFd14pYyESLWQh3p01mE16ufpbMmr+iKcxSnYVbsYq+ydgFWmeMnQ9VeZUypgSsuLcJFFDB2ATOVQfWj0IvAJvPUOWP3iBnLh6zltUl6Q3PiVlFug7XbLVKxIespUeRIhHsesMqMFB1apiGzkwnrw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=tbNPPDH/; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="tbNPPDH/" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4C1F4C2BD10; Fri, 14 Jun 2024 13:20:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1718371257; bh=0OIRru52fRlzhCGs2tHFFXy/+aeZhVjWXO72oWyFPUA=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=tbNPPDH/NFHO5b2wsxcpPeRTaWnYzmEXsSC2OVTOxmffpX4FjzfTIydAbsylery1M Wql0hnndcoIShMXrd90W6n3e4pKzbkSyOfDj6VEa2a3LGw9k1K4v6A4ITjCFv5cJZR pEzKnMwQC9wTOiKiF1Qj8xUVb/XgG/liQOAaMkWLiikN/9e8LlqbJ4Ee8q6EVMta6O JXzFD2SCP9poUenKMD8LHTmOyDrGWcqBPoKdok035EvIVwNhygz5SH7Ak3oBU0ajqM oCEiwIkp9gBC61WTf/2UIigYdwF/7ItCz7sVgzxEzsfKZDfxlQripQ00kxhzdemO+r lqDK/JoB2TZhw== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1sI6rP-003vQ3-87; Fri, 14 Jun 2024 14:20:55 +0100 Date: Fri, 14 Jun 2024 14:20:54 +0100 Message-ID: <86plsjk6dl.wl-maz@kernel.org> From: Marc Zyngier To: Oliver Upton Cc: kvmarm@lists.linux.dev, James Morse , Suzuki K Poulose , Zenghui Yu , kvm@vger.kernel.org, Fuad Tabba Subject: Re: [PATCH v2 03/15] KVM: arm64: nv: Handle CPACR_EL1 traps In-Reply-To: <20240613201756.3258227-4-oliver.upton@linux.dev> References: <20240613201756.3258227-1-oliver.upton@linux.dev> <20240613201756.3258227-4-oliver.upton@linux.dev> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.2 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: oliver.upton@linux.dev, kvmarm@lists.linux.dev, james.morse@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, kvm@vger.kernel.org, tabba@google.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Thu, 13 Jun 2024 21:17:44 +0100, Oliver Upton wrote: > > From: Marc Zyngier > > Handle CPACR_EL1 accesses when running a VHE guest. In order to > limit the cost of the emulation, implement it ass a shallow exit. > > In the other cases: > > - this is a nVHE L1 which will write to memory, and we don't trap > > - this is a L2 guest: > > * the L1 has CPTR_EL2.TCPAC==0, and the L2 has direct register > access > > * the L1 has CPTR_EL2.TCPAC==1, and the L2 will trap, but the > handling is defered to the general handling for forwarding > > Signed-off-by: Marc Zyngier > Signed-off-by: Oliver Upton > --- > arch/arm64/kvm/hyp/vhe/switch.c | 32 +++++++++++++++++++++++++++++++- > 1 file changed, 31 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/kvm/hyp/vhe/switch.c b/arch/arm64/kvm/hyp/vhe/switch.c > index d7af5f46f22a..fed36457fef9 100644 > --- a/arch/arm64/kvm/hyp/vhe/switch.c > +++ b/arch/arm64/kvm/hyp/vhe/switch.c > @@ -262,10 +262,40 @@ static bool kvm_hyp_handle_eret(struct kvm_vcpu *vcpu, u64 *exit_code) > return true; > } > > +static bool kvm_hyp_handle_cpacr_el1(struct kvm_vcpu *vcpu, u64 *exit_code) > +{ > + u64 esr = kvm_vcpu_get_esr(vcpu); > + int rt; > + > + if (!is_hyp_ctxt(vcpu) || esr_sys64_to_sysreg(esr) != SYS_CPACR_EL1) > + return false; > + > + rt = kvm_vcpu_sys_get_rt(vcpu); > + > + if ((esr & ESR_ELx_SYS64_ISS_DIR_MASK) == ESR_ELx_SYS64_ISS_DIR_READ) { > + vcpu_set_reg(vcpu, rt, __vcpu_sys_reg(vcpu, CPTR_EL2)); > + } else { > + vcpu_write_sys_reg(vcpu, vcpu_get_reg(vcpu, rt), CPTR_EL2); > + __activate_cptr_traps(vcpu); This doesn't bisect, as this helper is only introduced in patch #10. You probably want to keep it towards the end of the series. Thanks, M. -- Without deviation from the norm, progress is not possible.