From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08A5EC761A6 for ; Tue, 28 Mar 2023 11:10:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232729AbjC1LKf (ORCPT ); Tue, 28 Mar 2023 07:10:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40174 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232745AbjC1LKW (ORCPT ); Tue, 28 Mar 2023 07:10:22 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BF3E67EFE; Tue, 28 Mar 2023 04:09:50 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id A8EECB81BDF; Tue, 28 Mar 2023 11:08:35 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 67737C433EF; Tue, 28 Mar 2023 11:08:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1680001714; bh=N9Rk/tZgAVz7UtlVlD7im4WoaPb6cvoI3HAJlK59C7s=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=lrqkPBBxWHLidCDsHpw67ReT1km3h/Kvs7Zjj1cSzyGNS+FJI6YfGFmigne76V3Ix yK+se0982QKjbrYPudofLNB6ouOWXkhtdUr8yZz6N1CDaAGD31dAcpGQqhlJlCxWG/ kzgcuHW+FyQclloMauwUVYiXfuUa7zXTtMPGbPOoUiKaN/bMtoSdGZpq53j73bRlvG RUI8KsM2S7K6W/abomBD/kGn07O41LD4cdGlXMInjzCQZt2oOjtp3xRM8nrI90CArr yZ7kIyY6xOrSKhq//sp09fpMMKCsE5d+o1XqqjEMel0QdluMw2Och8Mz6mRbGtdwhI 160sAv/y2RBcw== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1ph7Bn-003k2p-PN; Tue, 28 Mar 2023 12:08:32 +0100 Date: Tue, 28 Mar 2023 12:08:31 +0100 Message-ID: <86pm8tw2ts.wl-maz@kernel.org> From: Marc Zyngier To: Reiji Watanabe Cc: Oliver Upton , kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Alexandru Elisei , Zenghui Yu , Suzuki K Poulose , Paolo Bonzini , Ricardo Koller , Jing Zhang , Raghavendra Rao Anata , Will Deacon , stable@vger.kernel.org Subject: Re: [PATCH v1] KVM: arm64: PMU: Restore the guest's EL0 event counting after migration In-Reply-To: <20230328034725.2051499-1-reijiw@google.com> References: <20230328034725.2051499-1-reijiw@google.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: reijiw@google.com, oliver.upton@linux.dev, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, james.morse@arm.com, alexandru.elisei@arm.com, yuzenghui@huawei.com, suzuki.poulose@arm.com, pbonzini@redhat.com, ricarkol@google.com, jingzhangos@google.com, rananta@google.com, will@kernel.org, stable@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Tue, 28 Mar 2023 04:47:25 +0100, Reiji Watanabe wrote: > > Currently, with VHE, KVM enables the EL0 event counting for the > guest on vcpu_load() or KVM enables it as a part of the PMU > register emulation process, when needed. However, in the migration > case (with VHE), the same handling is lacking. So, enable it on the > first KVM_RUN with VHE (after the migration) when needed. It wasn't completely clear to me how the migration case was affected by this until I started digging into the call stack: At load-time, the PMCR_EL0 effects haven't been propagated yet (the events haven't been created, as this is what kvm_pmu_handle_pmcr() does on first run). So there is an ordering inversion between kvm_pmu_handle_pmcr() and kvm_vcpu_pmu_restore_guest(). Moving the latter call into the former fixes the issue, completely emulating an extra write to PMCR_EL0. I think it would be worth capturing some of the above in the commit message so that it doesn't get lost... > > Fixes: d0c94c49792c ("KVM: arm64: Restore PMU configuration on first run") > Cc: stable@vger.kernel.org > Signed-off-by: Reiji Watanabe > --- > arch/arm64/kvm/pmu-emul.c | 1 + > arch/arm64/kvm/sys_regs.c | 1 - > 2 files changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c > index c243b10f3e15..5eca0cdd961d 100644 > --- a/arch/arm64/kvm/pmu-emul.c > +++ b/arch/arm64/kvm/pmu-emul.c > @@ -558,6 +558,7 @@ void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val) > for_each_set_bit(i, &mask, 32) > kvm_pmu_set_pmc_value(kvm_vcpu_idx_to_pmc(vcpu, i), 0, true); > } > + kvm_vcpu_pmu_restore_guest(vcpu); > } > > static bool kvm_pmu_counter_is_enabled(struct kvm_pmc *pmc) > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index 1b2c161120be..34688918c811 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -794,7 +794,6 @@ static bool access_pmcr(struct kvm_vcpu *vcpu, struct sys_reg_params *p, > if (!kvm_supports_32bit_el0()) > val |= ARMV8_PMU_PMCR_LC; > kvm_pmu_handle_pmcr(vcpu, val); > - kvm_vcpu_pmu_restore_guest(vcpu); > } else { > /* PMCR.P & PMCR.C are RAZ */ > val = __vcpu_sys_reg(vcpu, PMCR_EL0) With the nitpicking above addressed, and should this go into 6.3 as a fix: Reviewed-by: Marc Zyngier I can otherwise take it into 6.4, depending on what Oliver decides to do. Thanks, M. -- Without deviation from the norm, progress is not possible.