From: Marc Zyngier <maz@kernel.org>
To: Jing Zhang <jingzhangos@google.com>
Cc: KVM <kvm@vger.kernel.org>, KVMARM <kvmarm@lists.linux.dev>,
Joey Gouly <joey.gouly@arm.com>,
Andrew Jones <andrew.jones@linux.dev>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Oliver Upton <oliver.upton@linux.dev>
Subject: Re: [kvm-unit-tests PATCH v1 2/3] lib: arm64: Add bare-metal guest execution framework
Date: Tue, 17 Mar 2026 08:09:03 +0000 [thread overview]
Message-ID: <86wlza6fog.wl-maz@kernel.org> (raw)
In-Reply-To: <20260316224349.2360482-3-jingzhangos@google.com>
On Mon, 16 Mar 2026 22:43:48 +0000,
Jing Zhang <jingzhangos@google.com> wrote:
>
> To test advanced KVM features such as nested virtualization (NV) and
> GICv4 direct interrupt injection, kvm-unit-tests needs the ability to
> act as an L1 hypervisor running at EL2 and manage its own L2 guests.
>
> Introduce a lightweight guest management library that provides the
> infrastructure to create, configure, and execute nested guests.
>
> This framework includes:
> - Guest lifecycle management: `guest_create()` and `guest_destroy()`
> APIs to allocate guest context and setup Stage-2 identity mappings
> for code and stack using the s2mmu library.
> - Context switching: The `guest_run()` assembly routine handles
> saving the host (L1) callee-saved registers and loading the guest
> (L2) GPRs and EL1 system registers.
> - VM-Exit handling: Installs an EL2 trap handler (`guest_hyp_vectors`)
> to intercept guest exits and route them to `guest_c_exception_handler`
> to determine whether to return to the host test logic or resume.
> - Guest-internal exceptions: Provides `guest_el1_vectors` to catch
> Sync, IRQ, FIQ, and SError exceptions occurring entirely within the
> guest (EL1) without trapping to the host.
>
> Signed-off-by: Jing Zhang <jingzhangos@google.com>
> ---
> arm/Makefile.arm64 | 2 +
> lib/arm64/asm/guest.h | 156 ++++++++++++++++++++++++
> lib/arm64/guest.c | 197 ++++++++++++++++++++++++++++++
> lib/arm64/guest_arch.S | 263 +++++++++++++++++++++++++++++++++++++++++
> 4 files changed, 618 insertions(+)
> create mode 100644 lib/arm64/asm/guest.h
> create mode 100644 lib/arm64/guest.c
> create mode 100644 lib/arm64/guest_arch.S
>
> diff --git a/arm/Makefile.arm64 b/arm/Makefile.arm64
> index 5e50f5ba..9026fd71 100644
> --- a/arm/Makefile.arm64
> +++ b/arm/Makefile.arm64
> @@ -41,6 +41,8 @@ cflatobjs += lib/arm64/processor.o
> cflatobjs += lib/arm64/spinlock.o
> cflatobjs += lib/arm64/gic-v3-its.o lib/arm64/gic-v3-its-cmd.o
> cflatobjs += lib/arm64/stage2_mmu.o
> +cflatobjs += lib/arm64/guest.o
> +cflatobjs += lib/arm64/guest_arch.o
>
> ifeq ($(CONFIG_EFI),y)
> cflatobjs += lib/acpi.o
> diff --git a/lib/arm64/asm/guest.h b/lib/arm64/asm/guest.h
> new file mode 100644
> index 00000000..1d70873d
> --- /dev/null
> +++ b/lib/arm64/asm/guest.h
> @@ -0,0 +1,156 @@
> +/*
> + * Copyright (C) 2026, Google LLC.
> + * Author: Jing Zhang <jingzhangos@google.com>
> + *
> + * SPDX-License-Identifier: LGPL-2.0-or-later
> + */
> +#ifndef _ASMARM64_GUEST_H_
> +#define _ASMARM64_GUEST_H_
> +
> +/* Offsets for assembly (Must match struct guest) */
> +#define GUEST_X_OFFSET 0
> +#define GUEST_ELR_OFFSET 248
> +#define GUEST_SPSR_OFFSET 256
> +#define GUEST_HCR_OFFSET 264
> +#define GUEST_VTTBR_OFFSET 272
> +#define GUEST_SCTLR_OFFSET 280
> +#define GUEST_VBAR_OFFSET 288
> +#define GUEST_SP_EL1_OFFSET 296
> +#define GUEST_ESR_OFFSET 304
> +#define GUEST_FAR_OFFSET 312
> +#define GUEST_HPFAR_OFFSET 320
> +#define GUEST_EXIT_CODE_OFFSET 328
> +#define GUEST_TPIDR_EL1_OFFSET 336
> +#define GUEST_ICH_VMCR_EL2_OFFSET 344
Don't hardcode offsets. Generate them.
> +
> +#ifndef __ASSEMBLY__
> +
> +#include <libcflat.h>
> +#include <asm/stage2_mmu.h>
> +
> +/* HCR_EL2 Definitions */
> +#define HCR_VM (1UL << 0) /* Virtualization Enable */
> +#define HCR_FMO (1UL << 3) /* Physical FIQ Routing */
> +#define HCR_IMO (1UL << 4) /* Physical IRQ Routing */
> +#define HCR_AMO (1UL << 5) /* Physical SError Interrupt Routing */
> +#define HCR_RW (1UL << 31) /* Execution State: AArch64 */
> +#define HCR_DC (1UL << 12) /* Default Cacheable */
> +#define HCR_E2H (1UL << 34) /* EL2 Host */
Please consider importing the kernel's sysreg definition, or generate
them from an official source (the architecture JSON file, for
example).
> +
> +#define HCR_GUEST_FLAGS (HCR_VM | HCR_FMO | HCR_IMO | HCR_AMO | HCR_RW | \
> + HCR_DC | HCR_E2H)
Just to set expectations: HCR_EL2.DC is not supported by KVM, and
likely never will. I'm hopeful that this bit (and a few others) will
eventually be deprecated because it serves no purpose. If you need a
1:1 S1 mapping, create it using (surprise!) page tables.
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2026-03-17 8:09 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-16 22:43 [kvm-unit-tests PATCH v1 0/3] arm64: Add Stage-2 MMU and Nested Guest Framework Jing Zhang
2026-03-16 22:43 ` [kvm-unit-tests PATCH v1 1/3] lib: arm64: Add stage2 page table management library Jing Zhang
2026-03-24 15:12 ` Wei-Lin Chang
2026-03-16 22:43 ` [kvm-unit-tests PATCH v1 2/3] lib: arm64: Add bare-metal guest execution framework Jing Zhang
2026-03-17 1:46 ` Yao Yuan
2026-03-17 8:09 ` Marc Zyngier [this message]
2026-03-24 15:04 ` Joey Gouly
2026-03-24 15:44 ` Wei-Lin Chang
2026-03-16 22:43 ` [kvm-unit-tests PATCH v1 3/3] arm64: Add Stage-2 MMU demand paging test Jing Zhang
2026-03-24 11:43 ` [kvm-unit-tests PATCH v1 0/3] arm64: Add Stage-2 MMU and Nested Guest Framework Joey Gouly
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