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Tue, 11 Mar 2025 09:41:23 +0000 Date: Tue, 11 Mar 2025 09:41:22 +0000 Message-ID: <86y0xboqf1.wl-maz@kernel.org> From: Marc Zyngier To: Zhenyu Ye Cc: , , , , , , , , , , , Subject: Re: [PATCH v1 1/5] arm64/sysreg: add HDBSS related register information In-Reply-To: <20250311040321.1460-2-yezhenyu2@huawei.com> References: <20250311040321.1460-1-yezhenyu2@huawei.com> <20250311040321.1460-2-yezhenyu2@huawei.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: yezhenyu2@huawei.com, yuzenghui@huawei.com, will@kernel.org, oliver.upton@linux.dev, catalin.marinas@arm.com, joey.gouly@arm.com, linux-kernel@vger.kernel.org, xiexiangyou@huawei.com, zhengchuan@huawei.com, wangzhou1@hisilicon.com, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, kvmarm@lists.linux.dev X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Tue, 11 Mar 2025 04:03:17 +0000, Zhenyu Ye wrote: > > From: eillon > > The ARM architecture added the HDBSS feature and descriptions of > related registers (HDBSSBR/HDBSSPROD) in the DDI0601(ID121123) version, > add them to Linux. > > Signed-off-by: eillon > --- > arch/arm64/include/asm/esr.h | 2 ++ > arch/arm64/include/asm/kvm_arm.h | 1 + > arch/arm64/include/asm/sysreg.h | 4 ++++ > arch/arm64/tools/sysreg | 28 +++++++++++++++++++++++++++ > tools/arch/arm64/include/asm/sysreg.h | 4 ++++ > 5 files changed, 39 insertions(+) > > diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h > index d1b1a33f9a8b..a33befe0999a 100644 > --- a/arch/arm64/include/asm/esr.h > +++ b/arch/arm64/include/asm/esr.h > @@ -147,6 +147,8 @@ > #define ESR_ELx_CM (UL(1) << ESR_ELx_CM_SHIFT) > > /* ISS2 field definitions for Data Aborts */ > +#define ESR_ELx_HDBSSF_SHIFT (11) > +#define ESR_ELx_HDBSSF (UL(1) << ESR_ELx_HDBSSF_SHIFT) > #define ESR_ELx_TnD_SHIFT (10) > #define ESR_ELx_TnD (UL(1) << ESR_ELx_TnD_SHIFT) > #define ESR_ELx_TagAccess_SHIFT (9) > diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h > index c2417a424b98..80793ef57f8b 100644 > --- a/arch/arm64/include/asm/kvm_arm.h > +++ b/arch/arm64/include/asm/kvm_arm.h > @@ -122,6 +122,7 @@ > TCR_EL2_ORGN0_MASK | TCR_EL2_IRGN0_MASK) > > /* VTCR_EL2 Registers bits */ > +#define VTCR_EL2_HDBSS (1UL << 45) > #define VTCR_EL2_DS TCR_EL2_DS > #define VTCR_EL2_RES1 (1U << 31) > #define VTCR_EL2_HD (1 << 22) > diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h > index 05ea5223d2d5..b727772c06fb 100644 > --- a/arch/arm64/include/asm/sysreg.h > +++ b/arch/arm64/include/asm/sysreg.h > @@ -522,6 +522,10 @@ > #define SYS_VTCR_EL2 sys_reg(3, 4, 2, 1, 2) > > #define SYS_VNCR_EL2 sys_reg(3, 4, 2, 2, 0) > + > +#define SYS_HDBSSBR_EL2 sys_reg(3, 4, 2, 3, 2) > +#define SYS_HDBSSPROD_EL2 sys_reg(3, 4, 2, 3, 3) > + Why do you add this here? You have added these two new register to the sysreg file, which should be enough. > #define SYS_HAFGRTR_EL2 sys_reg(3, 4, 3, 1, 6) > #define SYS_SPSR_EL2 sys_reg(3, 4, 4, 0, 0) > #define SYS_ELR_EL2 sys_reg(3, 4, 4, 0, 1) > diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg > index 762ee084b37c..c2aea1e7fd22 100644 > --- a/arch/arm64/tools/sysreg > +++ b/arch/arm64/tools/sysreg > @@ -2876,6 +2876,34 @@ Sysreg GCSPR_EL2 3 4 2 5 1 > Fields GCSPR_ELx > EndSysreg > > +Sysreg HDBSSBR_EL2 3 4 2 3 2 > +Res0 63:56 > +Field 55:12 BADDR > +Res0 11:4 > +Enum 3:0 SZ > + 0b0001 8KB > + 0b0010 16KB > + 0b0011 32KB > + 0b0100 64KB > + 0b0101 128KB > + 0b0110 256KB > + 0b0111 512KB > + 0b1000 1MB > + 0b1001 2MB > +EndEnum > +EndSysreg > + > +Sysreg HDBSSPROD_EL2 3 4 2 3 3 > +Res0 63:32 > +Enum 31:26 FSC > + 0b000000 OK > + 0b010000 ExternalAbort > + 0b101000 GPF > +EndEnum > +Res0 25:19 > +Field 18:0 INDEX > +EndSysreg > + > Sysreg DACR32_EL2 3 4 3 0 0 > Res0 63:32 > Field 31:30 D15 > diff --git a/tools/arch/arm64/include/asm/sysreg.h b/tools/arch/arm64/include/asm/sysreg.h > index 150416682e2c..95fc6a4ee655 100644 > --- a/tools/arch/arm64/include/asm/sysreg.h > +++ b/tools/arch/arm64/include/asm/sysreg.h > @@ -518,6 +518,10 @@ > #define SYS_VTCR_EL2 sys_reg(3, 4, 2, 1, 2) > > #define SYS_VNCR_EL2 sys_reg(3, 4, 2, 2, 0) > + > +#define SYS_HDBSSBR_EL2 sys_reg(3, 4, 2, 3, 2) > +#define SYS_HDBSSPROD_EL2 sys_reg(3, 4, 2, 3, 3) > + Same thing here. > #define SYS_HAFGRTR_EL2 sys_reg(3, 4, 3, 1, 6) > #define SYS_SPSR_EL2 sys_reg(3, 4, 4, 0, 0) > #define SYS_ELR_EL2 sys_reg(3, 4, 4, 0, 1) Thanks, M. -- Without deviation from the norm, progress is not possible.