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To: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com>, linux-kernel@vger.kernel.org
Cc: bp@alien8.de, mingo@redhat.com, dave.hansen@linux.intel.com,
 Thomas.Lendacky@amd.com, nikunj@amd.com, Santosh.Shukla@amd.com,
 Vasant.Hegde@amd.com, Suravee.Suthikulpanit@amd.com, David.Kaplan@amd.com,
 x86@kernel.org, hpa@zytor.com, peterz@infradead.org, seanjc@google.com,
 pbonzini@redhat.com, kvm@vger.kernel.org, kirill.shutemov@linux.intel.com,
 huibo.wang@amd.com, naveen.rao@amd.com, francescolavra.fl@gmail.com
Subject: Re: [PATCH v3 02/17] x86/apic: Initialize Secure AVIC APIC backing
 page
In-Reply-To: <20250401113616.204203-3-Neeraj.Upadhyay@amd.com>
References: <20250401113616.204203-1-Neeraj.Upadhyay@amd.com>
 <20250401113616.204203-3-Neeraj.Upadhyay@amd.com>
Date: Thu, 03 Apr 2025 13:37:58 +0200
Message-ID: <871pu9wk4p.ffs@tglx>
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On Tue, Apr 01 2025 at 17:06, Neeraj Upadhyay wrote:
> +enum es_result savic_register_gpa(u64 gpa)
> +{
> +	struct ghcb_state state;
> +	struct es_em_ctxt ctxt;
> +	unsigned long flags;
> +	enum es_result res;
> +	struct ghcb *ghcb;
> +
> +	local_irq_save(flags);

        guard(irqsave)();

> +	ghcb = __sev_get_ghcb(&state);
> +
> +	vc_ghcb_invalidate(ghcb);
> +
> +	/* Register GPA for the local CPU */
> +	ghcb_set_rax(ghcb, -1ULL);
> +	ghcb_set_rbx(ghcb, gpa);
> +	res = sev_es_ghcb_hv_call(ghcb, &ctxt, SVM_VMGEXIT_SECURE_AVIC,
> +			SVM_VMGEXIT_SECURE_AVIC_REGISTER_GPA, 0);

https://www.kernel.org/doc/html/latest/process/maintainer-tip.html#line-breaks