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Tsirkin" , Paolo Bonzini , Richard Henderson , Eric Blake , Marcelo Tosatti , Alex =?utf-8?Q?Benn=C3=A9e?= , Peter Maydell , Jonathan Cameron , Sia Jee Heng , qemu-devel@nongnu.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Zhenyu Wang , Dapeng Mi , Yongwei Ma Subject: Re: [PATCH 1/8] hw/core: Make CPU topology enumeration arch-agnostic In-Reply-To: <20240704031603.1744546-2-zhao1.liu@intel.com> (Zhao Liu's message of "Thu, 4 Jul 2024 11:15:56 +0800") References: <20240704031603.1744546-1-zhao1.liu@intel.com> <20240704031603.1744546-2-zhao1.liu@intel.com> Date: Mon, 22 Jul 2024 15:24:24 +0200 Message-ID: <875xsx4l13.fsf@pond.sub.org> User-Agent: Gnus/5.13 (Gnus v5.13) Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17 One little thing... Zhao Liu writes: > Cache topology needs to be defined based on CPU topology levels. Thus, > define CPU topology enumeration in qapi/machine.json to make it generic > for all architectures. > > To match the general topology naming style, rename CPU_TOPO_LEVEL_SMT > and CPU_TOPO_LEVEL_PACKAGE to CPU_TOPO_LEVEL_THREAD and > CPU_TOPO_LEVEL_SOCKET. > > Also, enumerate additional topology levels for non-i386 arches, and add > a CPU_TOPO_LEVEL_DEFAULT to help future smp-cache object de-compatibilize > arch-specific cache topology settings. > > Signed-off-by: Zhao Liu [...] > diff --git a/qapi/machine-common.json b/qapi/machine-common.json > index fa6bd71d1280..82413c668bdb 100644 > --- a/qapi/machine-common.json > +++ b/qapi/machine-common.json > @@ -5,7 +5,7 @@ > # See the COPYING file in the top-level directory. > > ## > -# = Machines S390 data types > +# = Common machine types > ## > > ## > @@ -19,3 +19,48 @@ > { 'enum': 'CpuS390Entitlement', > 'prefix': 'S390_CPU_ENTITLEMENT', > 'data': [ 'auto', 'low', 'medium', 'high' ] } > + > +## > +# @CpuTopologyLevel: > +# > +# An enumeration of CPU topology levels. > +# > +# @invalid: Invalid topology level. > +# > +# @thread: thread level, which would also be called SMT level or > +# logical processor level. The @threads option in > +# SMPConfiguration is used to configure the topology of this > +# level. > +# > +# @core: core level. The @cores option in SMPConfiguration is used > +# to configure the topology of this level. > +# > +# @module: module level. The @modules option in SMPConfiguration is > +# used to configure the topology of this level. > +# > +# @cluster: cluster level. The @clusters option in SMPConfiguration > +# is used to configure the topology of this level. > +# > +# @die: die level. The @dies option in SMPConfiguration is used to > +# configure the topology of this level. > +# > +# @socket: socket level, which would also be called package level. > +# The @sockets option in SMPConfiguration is used to configure > +# the topology of this level. > +# > +# @book: book level. The @books option in SMPConfiguration is used > +# to configure the topology of this level. > +# > +# @drawer: drawer level. The @drawers option in SMPConfiguration is > +# used to configure the topology of this level. > +# > +# @default: default level. Some architectures will have default > +# topology settings (e.g., cache topology), and this special > +# level means following the architecture-specific settings. > +# > +# Since: 9.1 > +## > +{ 'enum': 'CpuTopologyLevel', > + 'prefix': 'CPU_TOPO_LEVEL', Why set a 'prefix'? > + 'data': [ 'invalid', 'thread', 'core', 'module', 'cluster', > + 'die', 'socket', 'book', 'drawer', 'default' ] } [...]