From: Vitaly Kuznetsov <vkuznets@redhat.com>
To: Sean Christopherson <sean.j.christopherson@intel.com>
Cc: Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: [PATCH 06/26] KVM: x86: Move MSR_IA32_BNDCFGS existence checks into vendor code
Date: Wed, 05 Feb 2020 15:53:45 +0100 [thread overview]
Message-ID: <878slhkruu.fsf@vitty.brq.redhat.com> (raw)
In-Reply-To: <20200129234640.8147-7-sean.j.christopherson@intel.com>
Sean Christopherson <sean.j.christopherson@intel.com> writes:
> Move the MSR_IA32_BNDCFGS existence check into vendor code by way of
> ->has_virtualized_msr(). AMD does not support MPX, and given that Intel
> is in the process of removing MPX, it's extremely unlikely AMD will ever
> support MPX.
>
> Note, invoking ->has_virtualized_msr() requires an extra retpoline, but
> kvm_init_msr_list() is not a hot path. As alluded to above, the
> motivation is to quarantine MPX as much as possible.
>
> No functional change intended.
>
> Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
> ---
> arch/x86/kvm/svm.c | 2 ++
> arch/x86/kvm/vmx/vmx.c | 2 ++
> arch/x86/kvm/x86.c | 4 ----
> 3 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
> index 4c8427f57b71..504118c49f46 100644
> --- a/arch/x86/kvm/svm.c
> +++ b/arch/x86/kvm/svm.c
> @@ -5990,6 +5990,8 @@ static bool svm_has_virtualized_msr(u32 index)
> switch (index) {
> case MSR_TSC_AUX:
> return boot_cpu_has(X86_FEATURE_RDTSCP);
> + case MSR_IA32_BNDCFGS:
> + return false;
> default:
> break;
> }
> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> index 9588914e941e..dbeef64f7409 100644
> --- a/arch/x86/kvm/vmx/vmx.c
> +++ b/arch/x86/kvm/vmx/vmx.c
> @@ -6279,6 +6279,8 @@ static bool vmx_has_virtualized_msr(u32 index)
> switch (index) {
> case MSR_TSC_AUX:
> return cpu_has_vmx_rdtscp();
> + case MSR_IA32_BNDCFGS:
> + return kvm_mpx_supported();
> default:
> break;
> }
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index a8619c52ea86..70cbb9164088 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -5237,10 +5237,6 @@ static void kvm_init_msr_list(void)
> * to the guests in some cases.
> */
> switch (msr_index) {
> - case MSR_IA32_BNDCFGS:
> - if (!kvm_mpx_supported())
> - continue;
> - break;
> case MSR_IA32_RTIT_CTL:
> case MSR_IA32_RTIT_STATUS:
> if (!kvm_x86_ops->pt_supported())
Reviewed-by: Vitaly Kuznetsov <vkuznets@redhat.com>
--
Vitaly
next prev parent reply other threads:[~2020-02-05 14:53 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-29 23:46 [PATCH 00/26] KVM: x86: Purge kvm_x86_ops->*_supported() Sean Christopherson
2020-01-29 23:46 ` [PATCH 01/26] KVM: x86: Remove superfluous brackets from case statement Sean Christopherson
2020-02-05 14:29 ` Vitaly Kuznetsov
2020-02-05 14:32 ` Sean Christopherson
2020-01-29 23:46 ` [PATCH 02/26] KVM: x86: Take an unsigned 32-bit int for has_emulated_msr()'s index Sean Christopherson
2020-02-05 14:30 ` Vitaly Kuznetsov
2020-01-29 23:46 ` [PATCH 03/26] KVM: x86: Snapshot MSR index in a local variable when processing lists Sean Christopherson
2020-02-05 14:31 ` Vitaly Kuznetsov
2020-01-29 23:46 ` [PATCH 04/26] KVM: x86: Add a kvm_x86_ops hook to query virtualized MSR support Sean Christopherson
2020-02-05 14:34 ` Vitaly Kuznetsov
2020-02-05 14:59 ` Sean Christopherson
2020-02-05 15:22 ` Vitaly Kuznetsov
2020-02-05 15:35 ` Sean Christopherson
2020-02-05 16:55 ` Vitaly Kuznetsov
2020-02-05 17:02 ` Sean Christopherson
2020-02-06 12:08 ` Vitaly Kuznetsov
2020-01-29 23:46 ` [PATCH 05/26] KVM: x86: Move MSR_TSC_AUX existence checks into vendor code Sean Christopherson
2020-02-05 14:39 ` Vitaly Kuznetsov
2020-01-29 23:46 ` [PATCH 06/26] KVM: x86: Move MSR_IA32_BNDCFGS " Sean Christopherson
2020-02-05 14:53 ` Vitaly Kuznetsov [this message]
2020-01-29 23:46 ` [PATCH 07/26] KVM: VMX: Add helpers to query Intel PT mode Sean Christopherson
2020-01-29 23:46 ` [PATCH 08/26] KVM: x86: Move RTIT (Intel PT) MSR existence checks into vendor code Sean Christopherson
2020-01-29 23:46 ` [PATCH 09/26] KVM: x86: Calculate the supported xcr0 mask at load time Sean Christopherson
2020-01-29 23:46 ` [PATCH 10/26] KVM: x86: Use supported_xcr0 to detect MPX support Sean Christopherson
2020-01-29 23:46 ` [PATCH 11/26] KVM: x86: Make kvm_mpx_supported() an inline function Sean Christopherson
2020-01-29 23:46 ` [PATCH 12/26] KVM: x86: Drop explicit @func param from ->set_supported_cpuid() Sean Christopherson
2020-01-29 23:46 ` [PATCH 13/26] KVM: x86: Use u32 for holding CPUID register value in helpers Sean Christopherson
2020-01-29 23:46 ` [PATCH 14/26] KVM: x86: Introduce cpuid_entry_{get,has}() accessors Sean Christopherson
2020-01-29 23:46 ` [PATCH 15/26] KVM: x86: Introduce cpuid_entry_{change,set,clear}() mutators Sean Christopherson
2020-01-29 23:46 ` [PATCH 16/26] KVM: x86: Add Kconfig-controlled auditing of reverse CPUID lookups Sean Christopherson
2020-01-29 23:46 ` [PATCH 17/26] KVM: x86: Handle MPX CPUID adjustment in vendor code Sean Christopherson
2020-01-29 23:46 ` [PATCH 18/26] KVM: x86: Handle INVPCID " Sean Christopherson
2020-01-29 23:46 ` [PATCH 19/26] KVM: x86: Handle UMIP emulation CPUID adjustment in VMX code Sean Christopherson
2020-01-29 23:46 ` [PATCH 20/26] KVM: x86: Handle PKU CPUID adjustment in SVM code Sean Christopherson
2020-01-29 23:46 ` [PATCH 21/26] KVM: x86: Handle RDTSCP CPUID adjustment in VMX code Sean Christopherson
2020-01-29 23:46 ` [PATCH 22/26] KVM: x86: Handle XSAVES " Sean Christopherson
2020-01-29 23:46 ` [PATCH 23/26] KVM: x86: Handle Intel PT CPUID adjustment in vendor code Sean Christopherson
2020-01-29 23:46 ` [PATCH 24/26] KVM: x86: Clear output regs for CPUID 0x14 if PT isn't exposed to guest Sean Christopherson
2020-01-29 23:46 ` [PATCH 25/26] KVM: x86: Handle main Intel PT CPUID leaf in vendor code Sean Christopherson
2020-01-30 0:38 ` Sean Christopherson
2020-01-29 23:46 ` [PATCH 26/26] KVM: VMX: Directly query Intel PT mode when refreshing PMUs Sean Christopherson
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