From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Aneesh Kumar K.V" Subject: Re: [PATCH 06/11] KVM: PPC: Book3S HV: Support POWER6 compatibility mode on POWER7 Date: Fri, 06 Sep 2013 10:58:16 +0530 Message-ID: <87a9jqiknj.fsf@linux.vnet.ibm.com> References: <20130906031003.GA29710@iris.ozlabs.ibm.com> <20130906032250.GG29710@iris.ozlabs.ibm.com> Mime-Version: 1.0 Content-Type: text/plain To: Paul Mackerras , Alexander Graf , kvm-ppc@vger.kernel.org, kvm@vger.kernel.org Return-path: In-Reply-To: <20130906032250.GG29710@iris.ozlabs.ibm.com> Sender: kvm-ppc-owner@vger.kernel.org List-Id: kvm.vger.kernel.org Paul Mackerras writes: > This enables us to use the Processor Compatibility Register (PCR) on > POWER7 to put the processor into architecture 2.05 compatibility mode > when running a guest. In this mode the new instructions and registers > that were introduced on POWER7 are disabled in user mode. This > includes all the VSX facilities plus several other instructions such > as ldbrx, stdbrx, popcntw, popcntd, etc. > > To select this mode, we have a new register accessible through the > set/get_one_reg interface, called KVM_REG_PPC_ARCH_COMPAT. Setting > this to zero gives the full set of capabilities of the processor. > Setting it to one of the "logical" PVR values defined in PAPR puts > the vcpu into the compatibility mode for the corresponding > architecture level. The supported values are: > > 0x0f000002 Architecture 2.05 (POWER6) > 0x0f000003 Architecture 2.06 (POWER7) > 0x0f100003 Architecture 2.06+ (POWER7+) > > Since the PCR is per-core, the architecture compatibility level and > the corresponding PCR value are stored in the struct kvmppc_vcore, and > are therefore shared between all vcpus in a virtual core. We already have KVM_SET_SREGS taking pvr as argument. Can't we do this kvmppc_set_pvr ?. Can you also share the qemu changes ? There I guess we need to do update the "cpu-version" in the device tree so that /proc/cpuinfo shows the right information in the guest -aneesh