From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7DC2A1922C1; Fri, 14 Jun 2024 10:56:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718362584; cv=none; b=Q5owF8s4f1gpgeLxsyKVQdPGsq5W/QygRSAWO4hvBRcirFcDakd58fP3Af+YjawzVgAyO3HTUdqmgN5peytSmiaegkoG0PkTAROEyCbVL9NFVL+1Q85hBVjijFx2fCw5TStO2tJTQ9cWzgfwBxA2WS7LW29uNAtCyEiBJabXdX8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718362584; c=relaxed/simple; bh=5r7N6D6dt9wZFpML6W5hQT17FrsvSr8pDDgZbtyQJxI=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=nixCPYxz5OQxDf9L0qnMXX9IY7Jr1vtpuK+hxqhdT8u+hWYegaZYvWe1crjb6dtBFOPIxlW9MxwTsb/kpDJSKYwc3slqftGa76KtYTxbQTpJ7dJFQ1WjAp0Np2Q07RpDnBcSmhyHqRM6W6VUQO8TJhVXe3WbJ/XR+QER4RRvf/Y= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=DV10GltX; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="DV10GltX" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 11F2BC2BD10; Fri, 14 Jun 2024 10:56:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1718362584; bh=5r7N6D6dt9wZFpML6W5hQT17FrsvSr8pDDgZbtyQJxI=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=DV10GltXSd/EIg2rB7Xf04cuZUoSGGDbDmEeqtS6kxNYDGhg1cEoCDfPfLWCnlUeL d+Ejjeik53bWFr9AfuKnu0a1L113gROx/xUkYhZR4c818nr9/G+ZcPigmzI+xBXuF8 7rRBob3FzU28w1ffsqp7tbGwCpsDL41eb9SB1Fz32NUmq1/Lqe/5+gSQDeukqw88U3 M4X1kn5/6eD5eutV3wcGXTDGBAVTxpWOfninRuhTrsgv5vWCLT5cxg84F7vrIrpyhT JkEiQlKSx9HF5UWKNKmTH6iGtWbXhtAnFgg5NZkmMdVwQPsKwvRjAfJjCRe/tNPo2e K5sM0PRixkBgA== Received: from ip-185-104-136-29.ptr.icomera.net ([185.104.136.29] helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1sI4bV-003tck-Q4; Fri, 14 Jun 2024 11:56:21 +0100 Date: Fri, 14 Jun 2024 11:56:20 +0100 Message-ID: <87bk433i97.wl-maz@kernel.org> From: Marc Zyngier To: Oliver Upton Cc: kvmarm@lists.linux.dev, James Morse , Suzuki K Poulose , Zenghui Yu , kvm@vger.kernel.org, Fuad Tabba , Jintack Lim , Christoffer Dall Subject: Re: [PATCH v2 01/15] KVM: arm64: nv: Forward FP/ASIMD traps to guest hypervisor In-Reply-To: <20240613201756.3258227-2-oliver.upton@linux.dev> References: <20240613201756.3258227-1-oliver.upton@linux.dev> <20240613201756.3258227-2-oliver.upton@linux.dev> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.104.136.29 X-SA-Exim-Rcpt-To: oliver.upton@linux.dev, kvmarm@lists.linux.dev, james.morse@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, kvm@vger.kernel.org, tabba@google.com, jintack.lim@linaro.org, christoffer.dall@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Thu, 13 Jun 2024 21:17:42 +0100, Oliver Upton wrote: > > From: Jintack Lim > > Give precedence to the guest hypervisor's trap configuration when > routing an FP/ASIMD trap taken to EL2. Take advantage of the > infrastructure for translating CPTR_EL2 into the VHE (i.e. EL1) format > and base the trap decision solely on the VHE view of the register. The > in-memory value of CPTR_EL2 will always be up to date for the guest > hypervisor (more on that later), so just read it directly from memory. > > Bury all of this behind a macro keyed off of the CPTR bitfield in > anticipation of supporting other traps (e.g. SVE). > > Signed-off-by: Jintack Lim > Signed-off-by: Christoffer Dall > [maz: account for HCR_EL2.E2H when testing for TFP/FPEN, with > all the hard work actually being done by Chase Conklin] > Signed-off-by: Marc Zyngier > [ oliver: translate nVHE->VHE format for testing traps; macro for reuse > in other CPTR_EL2.xEN fields ] > Signed-off-by: Oliver Upton > --- > arch/arm64/include/asm/kvm_emulate.h | 43 +++++++++++++++++++++++++ > arch/arm64/include/asm/kvm_nested.h | 1 - > arch/arm64/kvm/handle_exit.c | 16 ++++++--- > arch/arm64/kvm/hyp/include/hyp/switch.h | 3 ++ > 4 files changed, 58 insertions(+), 5 deletions(-) > > diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h > index 501e3e019c93..c3c5a5999ed7 100644 > --- a/arch/arm64/include/asm/kvm_emulate.h > +++ b/arch/arm64/include/asm/kvm_emulate.h > @@ -11,6 +11,7 @@ > #ifndef __ARM64_KVM_EMULATE_H__ > #define __ARM64_KVM_EMULATE_H__ > > +#include > #include > > #include > @@ -599,4 +600,46 @@ static __always_inline void kvm_reset_cptr_el2(struct kvm_vcpu *vcpu) > > kvm_write_cptr_el2(val); > } > + > +/* > + * Returns a 'sanitised' view of CPTR_EL2, translating from nVHE to the VHE > + * format if E2H isn't set. > + */ > +static inline u64 vcpu_sanitised_cptr_el2(const struct kvm_vcpu *vcpu) > +{ > + u64 cptr = __vcpu_sys_reg(vcpu, CPTR_EL2); > + > + if (!vcpu_el2_e2h_is_set(vcpu)) > + cptr = translate_cptr_el2_to_cpacr_el1(cptr); > + > + return cptr; > +} > + > +static inline bool ____cptr_xen_trap_enabled(const struct kvm_vcpu *vcpu, > + unsigned int xen) > +{ > + switch (xen) { > + case 0b00: > + case 0b10: > + return true; > + case 0b01: > + return vcpu_el2_tge_is_set(vcpu) && !vcpu_is_el2(vcpu); > + case 0b11: > + default: > + return false; > + } > +} > + > +#define __guest_hyp_cptr_xen_trap_enabled(vcpu, xen) \ > + (!vcpu_has_nv(vcpu) ? false : \ > + ____cptr_xen_trap_enabled(vcpu, \ > + SYS_FIELD_GET(CPACR_ELx, xen, \ > + vcpu_sanitised_cptr_el2(vcpu)))) > + > +static inline bool guest_hyp_fpsimd_traps_enabled(const struct kvm_vcpu *vcpu) > +{ > + return __guest_hyp_cptr_xen_trap_enabled(vcpu, FPEN); > +} > + > + > #endif /* __ARM64_KVM_EMULATE_H__ */ > diff --git a/arch/arm64/include/asm/kvm_nested.h b/arch/arm64/include/asm/kvm_nested.h > index 5e0ab0596246..5d55f76254c3 100644 > --- a/arch/arm64/include/asm/kvm_nested.h > +++ b/arch/arm64/include/asm/kvm_nested.h > @@ -75,5 +75,4 @@ static inline bool kvm_auth_eretax(struct kvm_vcpu *vcpu, u64 *elr) > return false; > } > #endif > - > #endif /* __ARM64_KVM_NESTED_H */ nit: spurious change. Aside from that: Reviewed-by: Marc Zyngier M. -- Without deviation from the norm, progress is not possible.