[PATCH] ARM: KVM: Emulate ID_DFR0 to say we don't support anything.

[PATCH] ARM: KVM: Emulate ID_DFR0 to say we don't support anything.

[Rusty Russell]

The guest should be checking this before trying to use performance monitors,
for example.

Signed-off-by: Rusty Russell <rusty.russell@linaro.org>

diff --git a/arch/arm/kvm/emulate.c b/arch/arm/kvm/emulate.c
index e356d1c..c07eb2b 100644
--- a/arch/arm/kvm/emulate.c
+++ b/arch/arm/kvm/emulate.c
@@ -238,6 +238,15 @@ static bool read_l2ctlr(struct kvm_vcpu *vcpu,
 	return true;
 }
 
+static bool read_id_dfr0(struct kvm_vcpu *vcpu,
+			 const struct coproc_params *p,
+			 unsigned long arg)
+{
+	/* We support no performance monitors (27-24 = b1111) and no debug */
+	*vcpu_reg(vcpu, p->Rt1) = 0x0F000000;
+	return true;
+}
+
 static bool access_cp15_reg(struct kvm_vcpu *vcpu,
 			    const struct coproc_params *p,
 			    unsigned long cp15_reg)
@@ -277,6 +286,9 @@ struct coproc_emulate {
 #define RW		.is_w  = DF
 
 static const struct coproc_emulate coproc_emulate[] = {
+	/* ID_DFR0 (guest asks what PMU/debug we support) */
+	{ CRn( 0), CRm( 1), Op1( 0), Op2( 2), is32,  READ,  read_id_dfr0},
+
 	/*
 	 * L2CTLR access:
 	 *

Re: [Android-virt] [PATCH] ARM: KVM: Emulate ID_DFR0 to say we don't support anything.

[Peter Maydell]

On 23 March 2012 00:38, Rusty Russell <rusty.russell@linaro.org> wrote:
> The guest should be checking this before trying to use performance monitors,
> for example.
>
> Signed-off-by: Rusty Russell <rusty.russell@linaro.org>

Does this code get used currently? I thought we hadn't enabled
trapping for feature register reads because of that use of one
of the MMFR registers in a hot path for page allocation...

-- PMM

Re: [Android-virt] [PATCH] ARM: KVM: Emulate ID_DFR0 to say we don't support anything.

[Rusty Russell]

On Fri, 23 Mar 2012 09:04:27 +0000, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 23 March 2012 00:38, Rusty Russell <rusty.russell@linaro.org> wrote:
> > The guest should be checking this before trying to use performance monitors,
> > for example.
> >
> > Signed-off-by: Rusty Russell <rusty.russell@linaro.org>
> 
> Does this code get used currently? I thought we hadn't enabled
> trapping for feature register reads because of that use of one
> of the MMFR registers in a hot path for page allocation...

True (I mis-labelled the patches, they should have been RFC, since this
is tied to the host-side probing patch).

So maybe not today, but we're going to end up doing this eventually.
Everyone expects their virtual machines to work fine with the next model
of ARM CPUs, which means we need to hide more and more host features
over time.

Cheers,
Rusty.
-- 
  How could I marry someone with more hair than me?  http://baldalex.org