From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Aneesh Kumar K.V" Subject: Re: [PATCH 6/7] KVM: PPC: Book3S HV: Fix ABIv2 on LE Date: Wed, 18 Jun 2014 20:51:46 +0530 Message-ID: <87ha3ickfp.fsf@linux.vnet.ibm.com> References: <1403021847-57177-1-git-send-email-agraf@suse.de> <1403021847-57177-7-git-send-email-agraf@suse.de> Mime-Version: 1.0 Content-Type: text/plain Cc: kvm@vger.kernel.org To: Alexander Graf , kvm-ppc@vger.kernel.org Return-path: In-Reply-To: <1403021847-57177-7-git-send-email-agraf@suse.de> Sender: kvm-ppc-owner@vger.kernel.org List-Id: kvm.vger.kernel.org Alexander Graf writes: > We use ABIv2 on Little Endian systems which gets rid of the dotted function > names. Branch to the actual functions when we see such a system. > > Signed-off-by: Alexander Graf As per patches sent by anton we don't need this. We can branch to the function rathen than the dot symbol http://article.gmane.org/gmane.linux.ports.ppc.embedded/68925 http://article.gmane.org/gmane.linux.ports.ppc.embedded/71005 -aneesh > --- > arch/powerpc/kvm/book3s_hv_rmhandlers.S | 22 ++++++++++++++-------- > 1 file changed, 14 insertions(+), 8 deletions(-) > > diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S > index 1a71f60..1ff3ebd 100644 > --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S > +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S > @@ -36,6 +36,12 @@ > #define NAPPING_CEDE 1 > #define NAPPING_NOVCPU 2 > > +#if defined(_CALL_ELF) && _CALL_ELF == 2 > +#define FUNC(name) name > +#else > +#define FUNC(name) GLUE(.,name) > +#endif > + > /* > * Call kvmppc_hv_entry in real mode. > * Must be called with interrupts hard-disabled. > @@ -668,9 +674,9 @@ END_FTR_SECTION_IFCLR(CPU_FTR_TM) > > mr r31, r4 > addi r3, r31, VCPU_FPRS_TM > - bl .load_fp_state > + bl FUNC(load_fp_state) > addi r3, r31, VCPU_VRS_TM > - bl .load_vr_state > + bl FUNC(load_vr_state) > mr r4, r31 > lwz r7, VCPU_VRSAVE_TM(r4) > mtspr SPRN_VRSAVE, r7 > @@ -1414,9 +1420,9 @@ END_FTR_SECTION_IFCLR(CPU_FTR_TM) > > /* Save FP/VSX. */ > addi r3, r9, VCPU_FPRS_TM > - bl .store_fp_state > + bl FUNC(store_fp_state) > addi r3, r9, VCPU_VRS_TM > - bl .store_vr_state > + bl FUNC(store_vr_state) > mfspr r6, SPRN_VRSAVE > stw r6, VCPU_VRSAVE_TM(r9) > 1: > @@ -2405,11 +2411,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX) > mtmsrd r8 > isync > addi r3,r3,VCPU_FPRS > - bl .store_fp_state > + bl FUNC(store_fp_state) > #ifdef CONFIG_ALTIVEC > BEGIN_FTR_SECTION > addi r3,r31,VCPU_VRS > - bl .store_vr_state > + bl FUNC(store_vr_state) > END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) > #endif > mfspr r6,SPRN_VRSAVE > @@ -2441,11 +2447,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX) > mtmsrd r8 > isync > addi r3,r4,VCPU_FPRS > - bl .load_fp_state > + bl FUNC(load_fp_state) > #ifdef CONFIG_ALTIVEC > BEGIN_FTR_SECTION > addi r3,r31,VCPU_VRS > - bl .load_vr_state > + bl FUNC(load_vr_state) > END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) > #endif > lwz r7,VCPU_VRSAVE(r31) -aneesh