From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rusty Russell Subject: Re: [kvmarm] [PATCH v4 09/14] KVM: ARM: Emulation framework and CP15 emulation Date: Tue, 20 Nov 2012 12:48:55 +1030 Message-ID: <87k3thow34.fsf@rustcorp.com.au> References: <20121110154203.2836.46686.stgit@chazy-air> <20121110154313.2836.2851.stgit@chazy-air> <20121119150105.GB3205@mudshark.cambridge.arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: Christoffer Dall , Rusty Russell , Marcelo Tosatti , "linux-arm-kernel\@lists.infradead.org" , "kvm\@vger.kernel.org" , "kvmarm\@lists.cs.columbia.edu" To: Peter Maydell , Will Deacon Return-path: Received: from ozlabs.org ([203.10.76.45]:57308 "EHLO ozlabs.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751855Ab2KTJsS (ORCPT ); Tue, 20 Nov 2012 04:48:18 -0500 In-Reply-To: Sender: kvm-owner@vger.kernel.org List-ID: Peter Maydell writes: > On 19 November 2012 15:01, Will Deacon wrote: >> On Sat, Nov 10, 2012 at 03:43:13PM +0000, Christoffer Dall wrote: >>> +/* >>> + * A15-specific CP15 registers. >>> + * Important: Must be sorted ascending by CRn, CRM, Op1, Op2 >>> + */ >>> +static const struct coproc_reg a15_regs[] = { >>> + /* MPIDR: we use VMPIDR for guest access. */ >>> + { CRn( 0), CRm( 0), Op1( 0), Op2( 5), is32, >>> + NULL, reset_mpidr, c0_MPIDR }, >>> + >>> + /* SCTLR: swapped by interrupt.S. */ >>> + { CRn( 1), CRm( 0), Op1( 0), Op2( 0), is32, >>> + NULL, reset_val, c1_SCTLR, 0x00C50078 }, >> >> Why is the SCTLR included here as an A15-specific register? > > Rusty might remember the exact answer, but probably because > the SCTLR reset value is IMPDEF. Indeed... Cheers, Rusty.