From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A149AC636D7 for ; Tue, 21 Feb 2023 22:18:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229940AbjBUWSC (ORCPT ); Tue, 21 Feb 2023 17:18:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44948 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229818AbjBUWR7 (ORCPT ); Tue, 21 Feb 2023 17:17:59 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 66DCB86A9 for ; Tue, 21 Feb 2023 14:17:58 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id DB850611E3 for ; Tue, 21 Feb 2023 22:17:57 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5370FC433D2; Tue, 21 Feb 2023 22:17:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1677017877; bh=7NgmTSoX6xFkJQjEiuCD2VFCagZVsbvuwdkjicAmDTg=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=cpxz3ikQozuEH9OqfOioetwbh5VQrJZXzjR2jjYEUgyQiINbhXX7OFi7l0W0Qv18T tCA9PAjHmCS7eDvPBhR/Uc3OKiVEtLOOwIwkUAIlmpFD3hsEUZkZVNVy+RnhRlZHjC UXk5PZmL2XQwCs5awMjufUke4p6cb/NiiAnsLegV1aLjhqJdcQlqcrU/f4hT616XIY a0y/VIRpg4Fx/AmqmRspyls1+A6dCiNwTcP5hc2EdL1SWXutuPoN1o+kSB+pWbdUuF IHA1+fQk8VtojpoVRmdTLWPN3CFIJvCqjU94UXH1G2+cMklGCIM2D1mvSH0B907K/H 1qpVJW/y4dS2A== Received: from sofa.misterjones.org ([185.219.108.64] helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1pUaxP-00CByA-1D; Tue, 21 Feb 2023 22:17:55 +0000 Date: Tue, 21 Feb 2023 22:17:54 +0000 Message-ID: <87lekqzmr1.wl-maz@kernel.org> From: Marc Zyngier To: "Veith, Simon" Cc: "kvmarm@lists.linux.dev" , "kvm@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "dwmw2@infradead.org" , "yuzenghui@huawei.com" , "suzuki.poulose@arm.com" , "james.morse@arm.com" , "oliver.upton@linux.dev" , "ricarkol@google.com" Subject: Re: [PATCH 00/16] KVM: arm64: Rework timer offsetting for fun and profit In-Reply-To: <5404a3554c3a1efd1e8e098072a4cf03d1b01152.camel@amazon.de> References: <20230216142123.2638675-1-maz@kernel.org> <5404a3554c3a1efd1e8e098072a4cf03d1b01152.camel@amazon.de> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: sveith@amazon.de, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, dwmw2@infradead.org, yuzenghui@huawei.com, suzuki.poulose@arm.com, james.morse@arm.com, oliver.upton@linux.dev, ricarkol@google.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Hi Simon, On Tue, 21 Feb 2023 16:28:36 +0000, "Veith, Simon" wrote: >=20 > Hello Marc, >=20 > On Thu, 2023-02-16 at 14:21 +0000, Marc Zyngier wrote: > > This series aims at satisfying multiple goals: > >=20 > > - allow a VMM to atomically restore a timer offset for a whole VM > > =C2=A0 instead of updating the offset each time a vcpu get its counter > > =C2=A0 written > >=20 > > - allow a VMM to save/restore the physical timer context, something > > =C2=A0 that we cannot do at the moment due to the lack of offsetting > >=20 > > - provide a framework that is suitable for NV support, where we get > > =C2=A0 both global and per timer, per vcpu offsetting >=20 > Thank you so much for following up on my (admittedly very basic) patch > with your own proposal! No worries. There is nothing like "nerd sniping"... ;-) > > This has been moderately tested with nVHE, VHE and NV. I do not have > > access to CNTPOFF-aware HW, so the jury is still out on that one >=20 > Same here about CNTPOFF -- I gave it a quick spin on Graviton2 and > Graviton3, and neither chip claims the ARM64_HAS_ECV_CNTPOFF capability > from your patch. Nah, G2/G3 are old stuff (v8.2 and v8.3+ respectively). You need at least a v8.6 system, something that is made of the best Unobtainium money can buy. M2 has ECV, but without CNTPOFF, which is just silly. > I am working on testing your series with our userspace and will report > back. Thanks a lot, that'd be super helpful. Please don't get too attached to the userspace interface though, as it is likely to change (Oliver has an interesting suggestion to simplify it, but I need to convince myself that it doesn't break migration of the physical timer). Thanks, M. --=20 Without deviation from the norm, progress is not possible.