From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4EFEAC433F5 for ; Fri, 29 Oct 2021 11:27:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2D88960E8B for ; Fri, 29 Oct 2021 11:27:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231820AbhJ2LaJ (ORCPT ); Fri, 29 Oct 2021 07:30:09 -0400 Received: from mail.kernel.org ([198.145.29.99]:48610 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231670AbhJ2LaI (ORCPT ); Fri, 29 Oct 2021 07:30:08 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8664F6113E; Fri, 29 Oct 2021 11:27:40 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mgQ2s-002P0J-8C; Fri, 29 Oct 2021 12:27:38 +0100 Date: Fri, 29 Oct 2021 12:27:37 +0100 Message-ID: <87lf2c9il2.wl-maz@kernel.org> From: Marc Zyngier To: Oliver Upton Cc: kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, James Morse , Alexandru Elisei , Suzuki K Poulose , linux-arm-kernel@lists.infradead.org, Andrew Jones , Peter Shier , Ricardo Koller , Reiji Watanabe Subject: Re: [PATCH 1/3] KVM: arm64: Stash OSLSR_EL1 in the cpu context In-Reply-To: <20211029003202.158161-2-oupton@google.com> References: <20211029003202.158161-1-oupton@google.com> <20211029003202.158161-2-oupton@google.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: oupton@google.com, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, james.morse@arm.com, alexandru.elisei@arm.com, suzuki.poulose@arm.com, linux-arm-kernel@lists.infradead.org, drjones@redhat.com, pshier@google.com, ricarkol@google.com, reijiw@google.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Fri, 29 Oct 2021 01:32:00 +0100, Oliver Upton wrote: > > An upcoming change to KVM will context switch the OS Lock status between > guest/host. Add OSLSR_EL1 to the cpu context and handle guest reads > using the stored value. > > Signed-off-by: Oliver Upton > --- > arch/arm64/include/asm/kvm_host.h | 1 + > arch/arm64/kvm/sys_regs.c | 13 ++++++------- > 2 files changed, 7 insertions(+), 7 deletions(-) > > diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h > index f8be56d5342b..c98f65c4a1f7 100644 > --- a/arch/arm64/include/asm/kvm_host.h > +++ b/arch/arm64/include/asm/kvm_host.h > @@ -172,6 +172,7 @@ enum vcpu_sysreg { > MDSCR_EL1, /* Monitor Debug System Control Register */ > MDCCINT_EL1, /* Monitor Debug Comms Channel Interrupt Enable Reg */ > DISR_EL1, /* Deferred Interrupt Status Register */ > + OSLSR_EL1, /* OS Lock Status Register */ Please move it one line up, next to the rest of the debug stuff (DISR_EL1 is RAS and not debug). > > /* Performance Monitors Registers */ > PMCR_EL0, /* Control Register */ > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index 1d46e185f31e..0eb03e7508fe 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -291,12 +291,11 @@ static bool trap_oslsr_el1(struct kvm_vcpu *vcpu, > struct sys_reg_params *p, > const struct sys_reg_desc *r) > { > - if (p->is_write) { > + if (p->is_write) > return ignore_write(vcpu, p); This should be UNDEF (though the HW should catch that, really). > - } else { > - p->regval = (1 << 3); > - return true; > - } > + > + p->regval = vcpu_read_sys_reg(vcpu, r->reg); > + return true; > } > > static bool trap_dbgauthstatus_el1(struct kvm_vcpu *vcpu, > @@ -1441,7 +1440,7 @@ static const struct sys_reg_desc sys_reg_descs[] = { > > { SYS_DESC(SYS_MDRAR_EL1), trap_raz_wi }, > { SYS_DESC(SYS_OSLAR_EL1), trap_raz_wi }, > - { SYS_DESC(SYS_OSLSR_EL1), trap_oslsr_el1 }, > + { SYS_DESC(SYS_OSLSR_EL1), trap_oslsr_el1, reset_val, OSLSR_EL1, 0x00000008 }, > { SYS_DESC(SYS_OSDLR_EL1), trap_raz_wi }, > { SYS_DESC(SYS_DBGPRCR_EL1), trap_raz_wi }, > { SYS_DESC(SYS_DBGCLAIMSET_EL1), trap_raz_wi }, > @@ -1916,7 +1915,7 @@ static const struct sys_reg_desc cp14_regs[] = { > { Op1( 0), CRn( 1), CRm( 0), Op2( 4), trap_raz_wi }, > DBGBXVR(1), > /* DBGOSLSR */ > - { Op1( 0), CRn( 1), CRm( 1), Op2( 4), trap_oslsr_el1 }, > + { Op1( 0), CRn( 1), CRm( 1), Op2( 4), trap_oslsr_el1, NULL, OSLSR_EL1 }, > DBGBXVR(2), > DBGBXVR(3), > /* DBGOSDLR */ Please update tools/testing/selftests/kvm/aarch64/get-reg-list.c before Andrew catches you red-handed! :D M. -- Without deviation from the norm, progress is not possible.