From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=BAYES_00,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5CBCEC07E95 for ; Tue, 13 Jul 2021 16:00:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 400E861158 for ; Tue, 13 Jul 2021 16:00:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237198AbhGMQCv (ORCPT ); Tue, 13 Jul 2021 12:02:51 -0400 Received: from mail.kernel.org ([198.145.29.99]:46384 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237196AbhGMQCv (ORCPT ); Tue, 13 Jul 2021 12:02:51 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 4B294610A6; Tue, 13 Jul 2021 16:00:01 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1m3KpD-00D7CY-6B; Tue, 13 Jul 2021 16:59:59 +0100 Date: Tue, 13 Jul 2021 16:59:58 +0100 Message-ID: <87mtqq6w75.wl-maz@kernel.org> From: Marc Zyngier To: "Russell King (Oracle)" Cc: linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, James Morse , Suzuki K Poulose , Alexandru Elisei , Alexandre Chartre , Robin Murphy , kernel-team@android.com Subject: Re: [PATCH 1/3] KVM: arm64: Narrow PMU sysreg reset values to architectural requirements In-Reply-To: <20210713143949.GJ22278@shell.armlinux.org.uk> References: <20210713135900.1473057-1-maz@kernel.org> <20210713135900.1473057-2-maz@kernel.org> <20210713143949.GJ22278@shell.armlinux.org.uk> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux@armlinux.org.uk, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, james.morse@arm.com, suzuki.poulose@arm.com, alexandru.elisei@arm.com, alexandre.chartre@oracle.com, robin.murphy@arm.com, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Tue, 13 Jul 2021 15:39:49 +0100, "Russell King (Oracle)" wrote: > > On Tue, Jul 13, 2021 at 02:58:58PM +0100, Marc Zyngier wrote: > > +static void reset_pmu_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) > > +{ > > + u64 n, mask; > > + > > + /* No PMU available, any PMU reg may UNDEF... */ > > + if (!kvm_arm_support_pmu_v3()) > > + return; > > + > > + n = read_sysreg(pmcr_el0) >> ARMV8_PMU_PMCR_N_SHIFT; > > + n &= ARMV8_PMU_PMCR_N_MASK; > > + > > + reset_unknown(vcpu, r); > > + > > + mask = BIT(ARMV8_PMU_CYCLE_IDX); > > + if (n) > > + mask |= GENMASK(n - 1, 0); > > + > > + __vcpu_sys_reg(vcpu, r->reg) &= mask; > > Would this read more logically to structure it as: > > mask = BIT(ARMV8_PMU_CYCLE_IDX); > > n = read_sysreg(pmcr_el0) >> ARMV8_PMU_PMCR_N_SHIFT; > n &= ARMV8_PMU_PMCR_N_MASK; > if (n) > mask |= GENMASK(n - 1, 0); > > reset_unknown(vcpu, r); > __vcpu_sys_reg(vcpu, r->reg) &= mask; > > ? Yup, that's nicer. Amended locally. Thanks, M. -- Without deviation from the norm, progress is not possible.