From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rusty Russell Subject: Re: [RFC 0/5] Making KVM_GET_ONE_REG/KVM_SET_ONE_REG generic. Date: Thu, 30 Aug 2012 04:09:07 +0930 Message-ID: <87mx1dsfuc.fsf@rustcorp.com.au> References: <877gsia8rm.fsf@rustcorp.com.au> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: QUOTED-PRINTABLE Cc: Avi Kivity , Christoffer Dall , Alexander Graf , kvmarm@lists.cs.columbia.edu, kvm-devel To: Peter Maydell Return-path: Received: from ozlabs.org ([203.10.76.45]:55800 "EHLO ozlabs.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754220Ab2H2Sjl convert rfc822-to-8bit (ORCPT ); Wed, 29 Aug 2012 14:39:41 -0400 In-Reply-To: Sender: kvm-owner@vger.kernel.org List-ID: Peter Maydell writes: > On 29 August 2012 00:37, Rusty Russell wro= te: >> This compiles, completely untested, but it's my attempt to g= ive >> Avi (and Alexander) what he asked for in a generic register accessor= =2E >> >> Mingled in these patches is the conversion of the latest KVM ARM cod= e, >> which is the first proposed user: by the end, we use these accessors= for >> *every* register and piece of state. >> >> GET_MULTI/SET_MULTI is an obvious extension which is not yet >> implemented. > > Hi Rusty. > > I don't see any api.txt patches in here, did I miss them? > (your cover letter doesn't include a diffstat...) > > I don't particularly have comments on the implementation but I would > like to see the kernel-userspace ABI clearly described rather than > having to infer it from the code. (including the complete set of > index mappings for the ARM registers that will use this) It would look something like this: diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/= kvm/api.txt index 19d8915..c0453d7 100644 --- a/Documentation/virtual/kvm/api.txt +++ b/Documentation/virtual/kvm/api.txt @@ -293,7 +293,7 @@ kvm_run' (see below). 4.11 KVM_GET_REGS =20 Capability: basic -Architectures: all +Architectures: all except ARM Type: vcpu ioctl Parameters: struct kvm_regs (out) Returns: 0 on success, -1 on error @@ -314,7 +314,7 @@ struct kvm_regs { 4.12 KVM_SET_REGS =20 Capability: basic -Architectures: all +Architectures: all except ARM Type: vcpu ioctl Parameters: struct kvm_regs (in) Returns: 0 on success, -1 on error @@ -1733,6 +1733,17 @@ registers, find a list below: | | PPC | KVM_REG_PPC_HIOR | 64 =20 +ARM registers are mapped using the lower 32 bits. The upper 16 of tha= t +is the coprocessor number (or 16 for core registers): + +ARM 32-bit CP15 registers have the following id bit patterns: + 0x4002 0000 000F + +ARM 64-bit CP15 registers have the following id bit patterns: + 0x4003 0000 000F + +ARM core registers have the following id format: + 0x4003 0000 0010 =20 4.69 KVM_GET_ONE_REG =20 @@ -1986,50 +1997,26 @@ the virtualized real-mode area (VRMA) facility,= the kernel will re-create the VMRA HPTEs on the next KVM_RUN of any vcpu.) =20 =20 -4.76 KVM_VCPU_GET_MSR_INDEX_LIST +4.76 KVM_VCPU_GET_REG_LIST =20 -Capability: basic +Capability: KVM_CAP_REG_LIST Architectures: arm Type: vcpu ioctl -Parameters: struct kvm_msr_list (in/out) +Parameters: struct kvm_reg_list (in/out) Returns: 0 on success; -1 on error Errors: - =C2=A0E2BIG: =C2=A0=C2=A0=C2=A0=C2=A0the msr index list is too big to= fit in the array specified by - =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0the user. + =C2=A0E2BIG: =C2=A0=C2=A0=C2=A0=C2=A0the reg index list is too big to= fit in the array specified by + =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0the user (the number required will be written into n). =20 struct kvm_msr_list { - __u32 nmsrs; /* number of msrs in entries */ - __u32 indices[0]; + __u64 n; /* number of registers in reg[] */ + __u64 reg[0]; }; =20 -This ioctl returns the guest special registers that are supported, and -is only valid after KVM_ARM_VCPU_INIT has been performed to initialize -the vcpu type and features. =C2=A0It is otherwise the equivalent of th= e -x86-specific KVM_GET_MSR_INDEX_LIST, for arm's coprocessor registers -and other non-register state. - -The numbering for the indices for coprocesors is simple: the upper 16 -bits are the coprocessor number. =C2=A0If it's > 15, it's something el= se, -for future expansion. - -Bit 15 indicates a 64-bit register. =C2=A0For 64 bit registers the bot= tom 4 -bits are CRm, the next 4 are opc1 (just like the MCRR/MRCC instruction -encoding). =C2=A0For 32 bit registers, the bottom 4 bits are CRm, the = next -3 are opc2, the next 4 CRn, and the next 3 opc1 (the same order as the -MRC/MCR instruction encoding, but not the same bit positions). - -64-bit coprocessor register: - =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0...|19 18 17 16|15|14 13 12 11 10= =C2=A09 =C2=A08| 7 =C2=A06 =C2=A05 =C2=A04 |3 =C2=A02 =C2=A01 =C2=A00| - =C2=A0...0 =C2=A00 | =C2=A0cp num =C2=A0=C2=A0| 1| 0 =C2=A00 =C2=A00 = =C2=A00 =C2=A00 =C2=A00 =C2=A00| =C2=A0=C2=A0opc1 =C2=A0=C2=A0=C2=A0=C2= =A0| =C2=A0=C2=A0CRm =C2=A0=C2=A0=C2=A0| - -32-bit coprocessor register: - =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0...|19 18 17 16|15|14|13 12 11|10= =C2=A09 =C2=A08 =C2=A07 |6 =C2=A05 =C2=A04 |3 =C2=A02 =C2=A01 =C2=A00| - =C2=A0...0 =C2=A00 | =C2=A0cp num =C2=A0=C2=A0| 0| 0| =C2=A0opc1 =C2=A0= | =C2=A0=C2=A0=C2=A0CRn =C2=A0=C2=A0=C2=A0=C2=A0| opc2 =C2=A0=C2=A0| =C2= =A0=C2=A0CRm =C2=A0=C2=A0=C2=A0| - -Non-coprocessor register: - - =C2=A0=C2=A0| 32 31 30 29 28 27 26 25 24 23 22 21 20|19 18 17 16 15 .= =2E. - =C2=A0=C2=A0| =C2=A0=C2=A0=C2=A0=C2=A0< some non-zero value > =C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0| ... +This ioctl returns the guest registers that are supported for the +KVM_GET_ONE_REG/KVM_SET_ONE_REG calls, and is only valid after +KVM_ARM_VCPU_INIT has been performed to initialize the vcpu type and +features. =20 =20 4.77 KVM_ARM_VCPU_INIT