[RFC v2 16/17] x86/sev: Prevent SECURE_AVIC_CONTROL MSR interception for Secure AVIC guests

Neeraj Upadhyay
2025-02-26T09:10:39Z

The SECURE_AVIC_CONTROL MSR (0xc0010138) holds the GPA of the guest
APIC backing page and bitfields to enable Secure AVIC and NMI.
This MSR is populated by the guest and the hypervisor should not
intercept it. A #VC exception will be generated otherwise. If
this should occur and Secure AVIC is enabled, terminate guest
execution.

Signed-off-by: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com>
---
Changes since v1:
- New change.

arch/x86/coco/sev/core.c | 9 +++++++++
1 file changed, 9 insertions(+)

diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c
index e48834d29518..0372779dae70 100644
--- a/arch/x86/coco/sev/core.c
+++ b/arch/x86/coco/sev/core.c
@@ -1483,6 +1483,15 @@ static enum es_result __vc_handle_msr(struct ghcb *ghcb, struct es_em_ctxt *ctxt
return __vc_handle_secure_tsc_msrs(regs, write);
else
break;
+ case MSR_AMD64_SECURE_AVIC_CONTROL:
+ /*
+ * AMD64_SECURE_AVIC_CONTROL should not be intercepted when
+ * Secure AVIC is enabled. Terminate the Secure AVIC guest
+ * if the interception is enabled.
+ */
+ if (cc_platform_has(CC_ATTR_SNP_SECURE_AVIC))
+ return ES_VMM_ERROR;
+ fallthrough;
default:
break;
}
--
2.34.1