From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6504A1C700C; Sat, 20 Sep 2025 09:27:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758360433; cv=none; b=XKSGq7Zk0p9uNAgeljm/6QF66r34UfgjS4g3wfnf99Kc++7qlqSss16bVhH/WtikDwxuROWUDpqhCbse+kwC4j9o3qOyB8ZdRK2SCQKfsrQGCAP4EO2sREDr/tEQ+ZY5ZBVTAPhxhs1ro5tWq4ZLQ9pK9fg7m2dYVip8ousWwwg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758360433; c=relaxed/simple; bh=I4s0iue0nSEPVDL9mXJlHVHLBhrFulIZ97iG0tR/S5o=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=NZTSyVY7y9W5WvItPeGaFiLRE6YC9Y3blL5p10T1W+3hYLZu1H4rxj5Hh1Kfl/QmM8prtHpwiYJd0AuAWUMBKmZk5HNgqMH3iU2lWK8UyqQQqccPx+0/gZJO7iGONcxrpTmBT1/BMPMwKykPnQO+lhnkivzcsZzToKLE5qgbUjQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Is/2hiQ5; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Is/2hiQ5" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C4E3CC4CEEB; Sat, 20 Sep 2025 09:27:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1758360432; bh=I4s0iue0nSEPVDL9mXJlHVHLBhrFulIZ97iG0tR/S5o=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=Is/2hiQ5h7qIi03Zgh8kaVHwaXPJgFesBSD36iWI8omddQd6V/8x+FSmtnkVGvHpV KzKcSZSfbkHhQFU3gWqZC1VVm5Wck/YT62ugpNaIovnYaSUgdrpfMcjjcOQ6J32YQV j7QN1ABto3Lurypy7RitnzIMVqAFgojxP9Ybjib9MDiJtPT6EuFklLmS/MFzXZJPBa h7UWpHnOl554QC5Mdkudk3MCjFQJi73kC0F0uw3JDMxbuWNMLcwuMMeR9j1+bkGFzX 6/ZEQj5DqbbqwOMKuqrhsmaCgaUsVP5bXDZt4HOjTqupKNF0xHYRPow0hg3/XQt99a +42V4eU1us6tg== Received: from sofa.misterjones.org ([185.219.108.64] helo=lobster-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1uzts6-00000007zvS-34nc; Sat, 20 Sep 2025 09:27:10 +0000 Date: Sat, 20 Sep 2025 10:27:10 +0100 Message-ID: <87seghxymp.wl-maz@kernel.org> From: Marc Zyngier To: Oliver Upton Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, Joey Gouly , Suzuki K Poulose , Zenghui Yu Subject: Re: [PATCH v2 07/16] KVM: arm64: Populate PAR_EL1 with 52bit addresses In-Reply-To: References: <20250915114451.660351-1-maz@kernel.org> <20250915114451.660351-8-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: oliver.upton@linux.dev, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Fri, 19 Sep 2025 23:00:59 +0100, Oliver Upton wrote: > > On Mon, Sep 15, 2025 at 12:44:42PM +0100, Marc Zyngier wrote: > > Expand the output address populated in PAR_EL1 to 52bit addresses. > > > > Signed-off-by: Marc Zyngier > > --- > > arch/arm64/kvm/at.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/arch/arm64/kvm/at.c b/arch/arm64/kvm/at.c > > index 952c02c57d7dd..1c2f7719b6cbb 100644 > > --- a/arch/arm64/kvm/at.c > > +++ b/arch/arm64/kvm/at.c > > @@ -844,7 +844,7 @@ static u64 compute_par_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi, > > } else if (wr->level == S1_MMU_DISABLED) { > > /* MMU off or HCR_EL2.DC == 1 */ > > par = SYS_PAR_EL1_NSE; > > - par |= wr->pa & GENMASK_ULL(47, 12); > > + par |= wr->pa & GENMASK_ULL(52, 12); > > That should be bit 51, no? > > Maybe just use SYS_PAR_EL1_PA as the mask. Humpf... Yes. Thanks, M. -- Jazz isn't dead. It just smells funny.