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[91.219.240.2]) by smtp.gmail.com with ESMTPSA id w17sm2251876wrp.79.2021.11.03.08.12.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Nov 2021 08:12:03 -0700 (PDT) From: Vitaly Kuznetsov To: Li RongQing Cc: lirongqing@baidu.com, pbonzini@redhat.com, seanjc@google.com, wanpengli@tencent.com, jmattson@google.com, joro@8bytes.org, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, x86@kernel.org, hpa@zytor.com, kvm@vger.kernel.org Subject: Re: [PATCH][v2] KVM: Clear pv eoi pending bit only when it is set In-Reply-To: <1634797513-11005-1-git-send-email-lirongqing@baidu.com> References: <1634797513-11005-1-git-send-email-lirongqing@baidu.com> Date: Wed, 03 Nov 2021 16:12:02 +0100 Message-ID: <87tugtmfy5.fsf@vitty.brq.redhat.com> MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Li RongQing writes: > merge pv_eoi_get_pending and pv_eoi_clr_pending into a single > function pv_eoi_test_and_clear_pending, which returns and clear > the value of the pending bit. > > and clear pv eoi pending bit only when it is set, to avoid calling > pv_eoi_put_user(), this can speed about 300 nsec on AMD EPYC most > of the time > > and make pv_eoi_set_pending as inline as there is only one user Compiler is likely smart enough to inline static functions with a single user anyway. > > Suggested-by: Vitaly Kuznetsov > Suggested-by: Paolo Bonzini > Signed-off-by: Li RongQing > --- > diff with v1: > merge as pv_eoi_test_and_clear_pending > add inline for pv_eoi_set_pending > > arch/x86/kvm/lapic.c | 47 +++++++++++++++++++++++------------------------ > 1 files changed, 23 insertions(+), 24 deletions(-) > > diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c > index 76fb009..4da5db8 100644 > --- a/arch/x86/kvm/lapic.c > +++ b/arch/x86/kvm/lapic.c > @@ -673,18 +673,7 @@ static inline bool pv_eoi_enabled(struct kvm_vcpu *vcpu) > return vcpu->arch.pv_eoi.msr_val & KVM_MSR_ENABLED; > } > > -static bool pv_eoi_get_pending(struct kvm_vcpu *vcpu) > -{ > - u8 val; > - if (pv_eoi_get_user(vcpu, &val) < 0) { > - printk(KERN_WARNING "Can't read EOI MSR value: 0x%llx\n", > - (unsigned long long)vcpu->arch.pv_eoi.msr_val); > - return false; > - } > - return val & KVM_PV_EOI_ENABLED; > -} > - > -static void pv_eoi_set_pending(struct kvm_vcpu *vcpu) > +static inline void pv_eoi_set_pending(struct kvm_vcpu *vcpu) > { > if (pv_eoi_put_user(vcpu, KVM_PV_EOI_ENABLED) < 0) { > printk(KERN_WARNING "Can't set EOI MSR value: 0x%llx\n", > @@ -694,14 +683,31 @@ static void pv_eoi_set_pending(struct kvm_vcpu *vcpu) > __set_bit(KVM_APIC_PV_EOI_PENDING, &vcpu->arch.apic_attention); > } > > -static void pv_eoi_clr_pending(struct kvm_vcpu *vcpu) > +static inline bool pv_eoi_test_and_clr_pending(struct kvm_vcpu *vcpu) > { > - if (pv_eoi_put_user(vcpu, KVM_PV_EOI_DISABLED) < 0) { > + u8 val; > + > + if (pv_eoi_get_user(vcpu, &val) < 0) { > + printk(KERN_WARNING "Can't read EOI MSR value: 0x%llx\n", > + (unsigned long long)vcpu->arch.pv_eoi.msr_val); pr_warn() would probably be a better choice but looking at this makes me wonder: isn't it triggerable by the guest? I think it is when the value written to MSR_KVM_PV_EOI_EN is bogus and this is bad: we don't even ratelimit these messages! I think this printk() needs to be dropped. > + return false; > + } > + > + val &= KVM_PV_EOI_ENABLED; > + > + /* > + * Clear pending bit in any case: it will be set again on vmentry. > + * While this might not be ideal from performance point of view, > + * this makes sure pv eoi is only enabled when we know it's safe. > + */ > + if (val && pv_eoi_put_user(vcpu, KVM_PV_EOI_DISABLED) < 0) { > printk(KERN_WARNING "Can't clear EOI MSR value: 0x%llx\n", > (unsigned long long)vcpu->arch.pv_eoi.msr_val); ... and this one, probably, too. > - return; > + return false; > } > __clear_bit(KVM_APIC_PV_EOI_PENDING, &vcpu->arch.apic_attention); > + > + return !!val; > } > > static int apic_has_interrupt_for_ppr(struct kvm_lapic *apic, u32 ppr) > @@ -2673,7 +2679,6 @@ void __kvm_migrate_apic_timer(struct kvm_vcpu *vcpu) > static void apic_sync_pv_eoi_from_guest(struct kvm_vcpu *vcpu, > struct kvm_lapic *apic) > { > - bool pending; > int vector; > /* > * PV EOI state is derived from KVM_APIC_PV_EOI_PENDING in host > @@ -2687,14 +2692,8 @@ static void apic_sync_pv_eoi_from_guest(struct kvm_vcpu *vcpu, > * -> host enabled PV EOI, guest executed EOI. > */ > BUG_ON(!pv_eoi_enabled(vcpu)); > - pending = pv_eoi_get_pending(vcpu); > - /* > - * Clear pending bit in any case: it will be set again on vmentry. > - * While this might not be ideal from performance point of view, > - * this makes sure pv eoi is only enabled when we know it's safe. > - */ > - pv_eoi_clr_pending(vcpu); > - if (pending) > + > + if (pv_eoi_test_and_clr_pending(vcpu)) > return; > vector = apic_set_eoi(apic); > trace_kvm_pv_eoi(apic, vector); -- Vitaly