From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 091E4339844; Thu, 2 Jul 2026 18:13:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783015991; cv=none; b=FIHXc4SrWCG5FI/loIW83qfFudKK04xSYHB0IksdCJZw+NI2RYHw6kPogf0Gl9bTMQ8gyoYo7gc8vggT8KjGEER7nHu6PSvGVpLOsg4Yne4O4UAooeCrcnCWHTFdM4ojlhax6TLWoacog+sZhUM2seeMt7ZKmMyHigfkQi/SVsQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783015991; c=relaxed/simple; bh=/IUrRrU2fqS2wvO4KMRmmEZyUgG7zWNHLp/fCtLzedM=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=TpJ4RA1zK690CTA5U49ItjPzK7SUhX4eJXk4RqkJwJB6JYD88K8C9uNjC7yzT0hVU1DyeGe37DbAnVkopeKGzJlupNYKx1yyuDM9NoCnrOqF+B/7nXBTRqB62oesrGu1fWiqL0RJerbmV+iQ7vSPV1rHCvAB675vtnya8t76ECU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=UMW+4NWp; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="UMW+4NWp" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9CE431F000E9; Thu, 2 Jul 2026 18:13:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1783015989; bh=ATD6Voa6jFN5dw/wJtF0KsbwSNwAYDBGrIbKhlvGEFU=; h=Date:From:To:Cc:Subject:In-Reply-To:References; b=UMW+4NWp1T2E6BecOnXDvoOp3r+qTv5Toi0KKT3U9nAgwvskEaswtlPCqXvI/6t5K U1cM452vCWng9NPx32wkuYKSNqImbI33nsL5IrGlecgoNfsVJtkA+ODi+zewfiigYC +JvyqrKuy1y4y3O2nL4S9/KMaJLt3bzr416lYP4IPRHs/CSQQgpwoLcDnOLznuOYib hXUVxIBRv0vPKuOZci8BxYSuTRX6SAuiRjdseqXrX7V5jV9FBZPcMqE8wPW6XlSVAV 3OvWbZz9JaxjHABQ1LHNrmnGGgJgW2WSWJfNwJj5vSSBrMzkN09weo/67CN2wgolDr a1qT4G76RmMhw== Received: from sofa.misterjones.org ([185.219.108.64] helo=lobster-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wfLuN-00000000rvQ-2CKv; Thu, 02 Jul 2026 18:13:07 +0000 Date: Thu, 02 Jul 2026 19:14:56 +0100 Message-ID: <87wlvd6yxr.wl-maz@kernel.org> From: Marc Zyngier To: sashiko-reviews@lists.linux.dev Cc: kvmarm@lists.linux.dev, "Oliver Upton" , kvm@vger.kernel.org Subject: Re: [PATCH 22/28] KVM: arm64: Add routing for NVHCR_EL2 trap In-Reply-To: <20260702162608.6D0FD1F00A3D@smtp.kernel.org> References: <20260702160248.1377250-1-maz@kernel.org> <20260702160248.1377250-23-maz@kernel.org> <20260702162608.6D0FD1F00A3D@smtp.kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: sashiko-reviews@lists.linux.dev, kvmarm@lists.linux.dev, oupton@kernel.org, kvm@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Thu, 02 Jul 2026 17:26:07 +0100, sashiko-bot@kernel.org wrote: > > Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: > - [High] The trap routing condition for `NVHCR_EL2` incorrectly uses a logical OR (`MCB`) instead of a logical AND, causing improper trap injection to guest EL2. > -- > > commit 6d634fa5ff4e9b082f4e46e999fa4990ecf38957 > Author: Marc Zyngier > > KVM: arm64: Add routing for NVHCR_EL2 trap > > NVHCR_EL2 accesses from EL1 are taken to EL2 when HCRX_EL2.NVTGE==0 > and HCR_EL2.NV==1. Describe this in the exception routing tables. > > > diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-nested.c > > index b7f3d86a94031..f5dc578d8c985 100644 > > --- a/arch/arm64/kvm/emulate-nested.c > > +++ b/arch/arm64/kvm/emulate-nested.c > [ ... ] > > @@ -468,6 +477,7 @@ static const enum cgt_group_id *coarse_control_combo[] = { > > CGT_HCR_TVM, CGT_HCR_TRVM, CGT_HCRX_SCTLR2En), > > MCB(CGT_HCR_TPU_TICAB, CGT_HCR_TPU, CGT_HCR_TICAB), > > MCB(CGT_HCR_TPU_TOCU, CGT_HCR_TPU, CGT_HCR_TOCU), > > + MCB(CGT_HCR_NV_HCRX_nNVTGE, CGT_HCR_NV, CGT_HCRX_nNVTGE), > > [Severity: High] > Does this correctly evaluate the trap condition as an AND? > > The commit message indicates the trap is taken when "HCRX_EL2.NVTGE==0 and > HCR_EL2.NV==1". However, coarse_control_combo[] uses the MCB() macro, which > evaluates multiple conditions using a bitwise OR: > > arch/arm64/kvm/emulate-nested.c:__compute_trap_behaviour() { > ... > for (int i = 0; cgids[i] != __RESERVED__; i++) > b |= __compute_trap_behaviour(vcpu, cgids[i], b); > ... > } > > Because this ORs the behaviors, the trap will be forwarded if HCR_EL2.NV == 1 > OR HCRX_EL2.NVTGE == 0 evaluates to forward. This would erroneously send the > trap to EL2 even if normal execution without nested virt is active (NV == 0 > and NVTGE == 0). > > Should this use a __COMPLEX_CONDITIONS__ callback instead to enforce the > logical AND? Grmbl. Yes, well spotted. M. -- Jazz isn't dead. It just smells funny.