From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35BC9C7EE2D for ; Fri, 3 Mar 2023 16:31:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231143AbjCCQbz (ORCPT ); Fri, 3 Mar 2023 11:31:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39150 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231130AbjCCQbu (ORCPT ); Fri, 3 Mar 2023 11:31:50 -0500 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ABA07B453 for ; Fri, 3 Mar 2023 08:31:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1677861060; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=cbXxVdKVI0MvStnUdkmS7+GsdOiKehJxOLzVcQzqHrM=; b=LV+8vYtqF0jIHfodqTi1Xkc4cawoQ2rZECkJANv9F4rOSA7m6jFIOHo79uORF5ZbbZ8J0A D5+kbXPqnn+bNlAK2nM0FPPROi7mZrmCH4LMLZC/viymb/gssUeHIoD+lUH48PAerMxYeN dwmAO0NFdRrCsRQATRy0iVzN5biNEX8= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-114-Z6DqMzh-OuCQwFxsmp0oYA-1; Fri, 03 Mar 2023 11:30:59 -0500 X-MC-Unique: Z6DqMzh-OuCQwFxsmp0oYA-1 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.rdu2.redhat.com [10.11.54.3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id E5C851802D42; Fri, 3 Mar 2023 16:30:58 +0000 (UTC) Received: from localhost (unknown [10.39.194.66]) by smtp.corp.redhat.com (Postfix) with ESMTPS id A26A11121318; Fri, 3 Mar 2023 16:30:58 +0000 (UTC) From: Cornelia Huck To: Peter Maydell Cc: Andrea Bolognani , Thomas Huth , Laurent Vivier , qemu-arm@nongnu.org, qemu-devel@nongnu.org, kvm@vger.kernel.org, Eric Auger , "Dr. David Alan Gilbert" , Juan Quintela , Gavin Shan , Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= , Richard Henderson Subject: Re: [PATCH v6 1/2] arm/kvm: add support for MTE In-Reply-To: Organization: Red Hat GmbH References: <20230228150216.77912-1-cohuck@redhat.com> <20230228150216.77912-2-cohuck@redhat.com> <874jr4dbcr.fsf@redhat.com> <87sfeoblsa.fsf@redhat.com> <87cz5rmdlg.fsf@redhat.com> User-Agent: Notmuch/0.37 (https://notmuchmail.org) Date: Fri, 03 Mar 2023 17:30:57 +0100 Message-ID: <87zg8tztj2.fsf@redhat.com> MIME-Version: 1.0 Content-Type: text/plain X-Scanned-By: MIMEDefang 3.1 on 10.11.54.3 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Thu, Mar 02 2023, Peter Maydell wrote: > On Thu, 2 Mar 2023 at 14:29, Cornelia Huck wrote: >> >> On Thu, Mar 02 2023, Peter Maydell wrote: >> > I think having MTE in the specific case of KVM behave differently >> > to how we've done all these existing properties and how we've >> > done MTE for TCG would be confusing. The simplest thing is to just >> > follow the existing UI for TCG MTE. >> > >> > The underlying reason for this is that MTE in general is not a feature >> > only of the CPU, but also of the whole system design. It happens >> > that KVM gives us tagged RAM "for free" but that's an oddity >> > of the KVM implementation -- in real hardware there needs to >> > be system level support for tagging. >> >> Hm... the Linux kernel actually seems to consider MTE to be a cpu >> feature (at least, it lists it in the cpu features). >> >> So, is your suggestion to use the 'mte' prop of the virt machine to mean >> "enable all prereqs for MTE, i.e. allocate tag memory for TCG and enable >> MTE in the kernel for KVM"? For TCG, we'll get MTE for the max cpu >> model; for KVM, we'd get MTE for host (== max), but I'm wondering what >> should happen if we get named cpu models and the user specifies one >> where we won't have MTE (i.e. some pre-8.5 one)? > > I think we can probably cross that bridge when we get to it, > but I imagine the semantics would be "cortex-foo plus MTE" > (in the same way that -cpu cortex-foo,+x,-y can add and > subtract features from a baseline). I'm wondering how we should try to model this, given that cpu_model_advertised_features is a bit of a weird mix of architecture flags and implementation-specific knobs. Given that there are some KVM patchsets floating around to allow userspace to limit some features for migration compat handling, I don't think it will be too long before we'll try to figure out how to do cpu models for KVM in QEMU as well...