From: Vitaly Kuznetsov <vkuznets@redhat.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <seanjc@google.com>,
Anirudh Rayabharam <anrayabh@linux.microsoft.com>
Cc: Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
Ilias Stamatis <ilstam@amazon.com>,
Maxim Levitsky <mlevitsk@redhat.com>,
mail@anirudhrb.com, kumarpraveen@linux.microsoft.com,
wei.liu@kernel.org, robert.bradford@intel.com,
liuwe@microsoft.com, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] KVM: nVMX: Don't expose TSC scaling to L1 when on Hyper-V
Date: Wed, 22 Jun 2022 10:00:29 +0200 [thread overview]
Message-ID: <87zgi5xh42.fsf@redhat.com> (raw)
In-Reply-To: <YqiwoOP4HX2LniI4@google.com>
Sean Christopherson <seanjc@google.com> writes:
> On Tue, Jun 14, 2022, Anirudh Rayabharam wrote:
>> On Mon, Jun 13, 2022 at 04:57:49PM +0000, Sean Christopherson wrote:
...
>> >
>> > Any reason not to use the already sanitized vmcs_config? I can't think of any
>> > reason why the nested path should blindly use the raw MSR values from hardware.
>>
>> vmcs_config has the sanitized exec controls. But how do we construct MSR
>> values using them?
>
> I was thinking we could use the sanitized controls for the allowed-1 bits, and then
> take the required-1 bits from the CPU. And then if we wanted to avoid the redundant
> RDMSRs in a follow-up patch we could add required-1 fields to vmcs_config.
>
> Hastily constructed and compile-tested only, proceed with caution :-)
Independently from "[PATCH 00/11] KVM: VMX: Support TscScaling and
EnclsExitingBitmap whith eVMCS" which is supposed to fix the particular
TSC scaling issue, I like the idea to make nested_vmx_setup_ctls_msrs()
use both allowed-1 and required-1 bits from vmcs_config. I'll pick up
the suggested patch and try to construct something for required-1 bits.
Thanks!
--
Vitaly
next prev parent reply other threads:[~2022-06-22 8:00 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-13 16:16 [PATCH] KVM: nVMX: Don't expose TSC scaling to L1 when on Hyper-V Anirudh Rayabharam
2022-06-13 16:41 ` Sean Christopherson
2022-06-13 16:49 ` Paolo Bonzini
2022-06-13 16:57 ` Sean Christopherson
2022-06-14 15:28 ` Anirudh Rayabharam
2022-06-14 16:00 ` Sean Christopherson
2022-06-22 8:00 ` Vitaly Kuznetsov [this message]
2022-06-22 13:52 ` Anirudh Rayabharam
2022-06-22 14:35 ` Vitaly Kuznetsov
2022-06-22 16:19 ` Anirudh Rayabharam
2022-06-22 16:48 ` Vitaly Kuznetsov
2022-06-23 10:17 ` Anirudh Rayabharam
2022-06-23 11:49 ` Vitaly Kuznetsov
2022-06-28 10:30 ` Anirudh Rayabharam
2022-06-14 4:55 ` Anirudh Rayabharam
2022-06-14 12:16 ` Paolo Bonzini
2022-06-14 15:13 ` Anirudh Rayabharam
2022-06-14 17:28 ` Paolo Bonzini
2022-06-14 15:17 ` Anirudh Rayabharam
2022-06-14 12:12 ` Vitaly Kuznetsov
2022-06-14 12:19 ` Vitaly Kuznetsov
2022-06-14 15:01 ` Vitaly Kuznetsov
2022-06-15 11:30 ` Vitaly Kuznetsov
2022-06-14 17:20 ` Paolo Bonzini
2022-06-15 9:01 ` Anirudh Rayabharam
2022-06-15 9:36 ` Vitaly Kuznetsov
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