From mboxrd@z Thu Jan  1 00:00:00 1970
From: Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: RFC: Getting rid of LTR in VMX
Date: Mon, 20 Feb 2017 17:02:53 -0500 (EST)
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> > Yes.  But 150-200 clock cycles are nothing compared to the cache misses
> > you get from preemption, so I'd ignore that.  Saving 300 clock cycles on
> > userspace exits from TR+GSBASE would be about 5% on my Haswell.
> 
> That's still 5% :)

Yes, 5% on userspace exits is good (though they're rare).

OTOH, 300 clock cycles on preemption are nothing to write home about.

Paolo