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Sun, 19 Nov 2023 09:33:03 -0800 (PST) X-Google-Smtp-Source: AGHT+IHEwowleSE1HT+eTey8xjaU0nHGjxwnEn4bjwoQAHpzSw+fIjq/Rrupk3zgDka3oUADjycGyw== X-Received: by 2002:a05:600c:1c85:b0:405:39b4:3145 with SMTP id k5-20020a05600c1c8500b0040539b43145mr4342311wms.2.1700415183630; Sun, 19 Nov 2023 09:33:03 -0800 (PST) Received: from starship ([77.137.131.4]) by smtp.gmail.com with ESMTPSA id l6-20020a5d5606000000b00331698cb263sm8361056wrv.103.2023.11.19.09.33.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Nov 2023 09:33:03 -0800 (PST) Message-ID: <8c518aae88a6db2347813985ea4e7c2ccee585da.camel@redhat.com> Subject: Re: [PATCH 4/9] KVM: x86: Avoid double CPUID lookup when updating MWAIT at runtime From: Maxim Levitsky To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Date: Sun, 19 Nov 2023 19:33:01 +0200 In-Reply-To: <20231110235528.1561679-5-seanjc@google.com> References: <20231110235528.1561679-1-seanjc@google.com> <20231110235528.1561679-5-seanjc@google.com> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.36.5 (3.36.5-2.fc32) Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 7bit On Fri, 2023-11-10 at 15:55 -0800, Sean Christopherson wrote: > Move the handling of X86_FEATURE_MWAIT during CPUID runtime updates to > utilize the lookup done for other CPUID.0x1 features. > > No functional change intended. > > Signed-off-by: Sean Christopherson > --- > arch/x86/kvm/cpuid.c | 13 +++++-------- > 1 file changed, 5 insertions(+), 8 deletions(-) > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c > index 5cf3d697ecb3..6777780be6ae 100644 > --- a/arch/x86/kvm/cpuid.c > +++ b/arch/x86/kvm/cpuid.c > @@ -276,6 +276,11 @@ static void __kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu, struct kvm_cpuid_e > > cpuid_entry_change(best, X86_FEATURE_APIC, > vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE); > + > + if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT)) > + cpuid_entry_change(best, X86_FEATURE_MWAIT, > + vcpu->arch.ia32_misc_enable_msr & > + MSR_IA32_MISC_ENABLE_MWAIT); > } > > best = cpuid_entry2_find(entries, nent, 7, 0); > @@ -296,14 +301,6 @@ static void __kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu, struct kvm_cpuid_e > if (kvm_hlt_in_guest(vcpu->kvm) && best && > (best->eax & (1 << KVM_FEATURE_PV_UNHALT))) > best->eax &= ~(1 << KVM_FEATURE_PV_UNHALT); > - > - if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT)) { > - best = cpuid_entry2_find(entries, nent, 0x1, KVM_CPUID_INDEX_NOT_SIGNIFICANT); > - if (best) > - cpuid_entry_change(best, X86_FEATURE_MWAIT, > - vcpu->arch.ia32_misc_enable_msr & > - MSR_IA32_MISC_ENABLE_MWAIT); > - } > } > > void kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu) Reviewed-by: Maxim Levitsky Best regards, Maxim Levitsky