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From: "Mi, Dapeng" <dapeng1.mi@linux.intel.com>
To: Sean Christopherson <seanjc@google.com>,
	Paolo Bonzini <pbonzini@redhat.com>
Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	Yi Lai <yi1.lai@intel.com>,
	dongsheng <dongsheng.x.zhang@intel.com>
Subject: Re: [PATCH v3 2/5] KVM: selftests: Track unavailable_mask for PMU events as 32-bit value
Date: Fri, 19 Sep 2025 13:43:49 +0800	[thread overview]
Message-ID: <8e3faa80-7091-454b-8ac6-1aa431185c06@linux.intel.com> (raw)
In-Reply-To: <20250919004512.1359828-3-seanjc@google.com>


On 9/19/2025 8:45 AM, Sean Christopherson wrote:
> Track the mask of "unavailable" PMU events as a 32-bit value.  While bits
> 31:9 are currently reserved, silently truncating those bits is unnecessary
> and asking for missed coverage.  To avoid running afoul of the sanity check
> in vcpu_set_cpuid_property(), explicitly adjust the mask based on the
> non-reserved bits as reported by KVM's supported CPUID.
>
> Opportunistically update the "all ones" testcase to pass -1u instead of
> 0xff.
>
> Signed-off-by: Sean Christopherson <seanjc@google.com>
> ---
>  tools/testing/selftests/kvm/x86/pmu_counters_test.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/tools/testing/selftests/kvm/x86/pmu_counters_test.c b/tools/testing/selftests/kvm/x86/pmu_counters_test.c
> index 8aaaf25b6111..cfeed0103341 100644
> --- a/tools/testing/selftests/kvm/x86/pmu_counters_test.c
> +++ b/tools/testing/selftests/kvm/x86/pmu_counters_test.c
> @@ -311,7 +311,7 @@ static void guest_test_arch_events(void)
>  }
>  
>  static void test_arch_events(uint8_t pmu_version, uint64_t perf_capabilities,
> -			     uint8_t length, uint8_t unavailable_mask)
> +			     uint8_t length, uint32_t unavailable_mask)
>  {
>  	struct kvm_vcpu *vcpu;
>  	struct kvm_vm *vm;
> @@ -320,6 +320,9 @@ static void test_arch_events(uint8_t pmu_version, uint64_t perf_capabilities,
>  	if (!pmu_version)
>  		return;
>  
> +	unavailable_mask = GENMASK(X86_PROPERTY_PMU_EVENTS_MASK.hi_bit,
> +				   X86_PROPERTY_PMU_EVENTS_MASK.lo_bit);

Should be "unavailable_mask &="? Otherwise the incoming argument
"unavailable_mask" would be overwritten unconditionally. 


> +
>  	vm = pmu_vm_create_with_one_vcpu(&vcpu, guest_test_arch_events,
>  					 pmu_version, perf_capabilities);
>  
> @@ -630,7 +633,7 @@ static void test_intel_counters(void)
>  			 */
>  			for (j = 0; j <= NR_INTEL_ARCH_EVENTS + 1; j++) {
>  				test_arch_events(v, perf_caps[i], j, 0);
> -				test_arch_events(v, perf_caps[i], j, 0xff);
> +				test_arch_events(v, perf_caps[i], j, -1u);
>  
>  				for (k = 0; k < NR_INTEL_ARCH_EVENTS; k++)
>  					test_arch_events(v, perf_caps[i], j, BIT(k));

  reply	other threads:[~2025-09-19  5:43 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-19  0:45 [PATCH v3 0/5] KVM: selftests: PMU fixes for GNR/SRF/CWF Sean Christopherson
2025-09-19  0:45 ` [PATCH v3 1/5] KVM: selftests: Add timing_info bit support in vmx_pmu_caps_test Sean Christopherson
2025-09-19  0:45 ` [PATCH v3 2/5] KVM: selftests: Track unavailable_mask for PMU events as 32-bit value Sean Christopherson
2025-09-19  5:43   ` Mi, Dapeng [this message]
2025-09-19 14:52     ` Sean Christopherson
2025-09-19  0:45 ` [PATCH v3 3/5] KVM: selftests: Reduce number of "unavailable PMU events" combos tested Sean Christopherson
2025-09-19  5:44   ` Mi, Dapeng
2025-09-19  0:45 ` [PATCH v3 4/5] KVM: selftests: Validate more arch-events in pmu_counters_test Sean Christopherson
2025-09-19  0:45 ` [PATCH v3 5/5] KVM: selftests: Handle Intel Atom errata that leads to PMU event overcount Sean Christopherson
2025-09-19  5:49   ` Mi, Dapeng
2025-09-19 14:55     ` Sean Christopherson
2025-09-19 16:42       ` Sean Christopherson

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