From: Shaoqin Huang <shahuang@redhat.com>
To: Alexandru Elisei <alexandru.elisei@arm.com>,
Nadav Amit <nadav.amit@gmail.com>
Cc: Andrew Jones <andrew.jones@linux.dev>,
kvmarm@lists.linux.dev, kvmarm@lists.cs.columbia.edu,
kvm@vger.kernel.org, Nadav Amit <namit@vmware.com>
Subject: Re: [kvm-unit-tests PATCH 1/2] arm64: set sctlr_el1.SPAN
Date: Fri, 14 Jul 2023 19:29:28 +0800 [thread overview]
Message-ID: <94bd19db-7177-9e90-dc1a-de7485ebb18f@redhat.com> (raw)
In-Reply-To: <ZLEj_UnDnE4ZJtnD@monolith.localdoman>
Hi,
On 7/14/23 18:31, Alexandru Elisei wrote:
> Hi,
>
> On Sat, Jun 17, 2023 at 01:31:37AM +0000, Nadav Amit wrote:
>> From: Nadav Amit <namit@vmware.com>
>>
>> Do not assume PAN is not supported or that sctlr_el1.SPAN is already set.
>
> In arm/cstart64.S
>
> .globl start
> start:
> /* get our base address */
> [..]
>
> 1:
> /* zero BSS */
> [..]
>
> /* zero and set up stack */
> [..]
>
> /* set SCTLR_EL1 to a known value */
> ldr x4, =INIT_SCTLR_EL1_MMU_OFF
> [..]
>
> /* set up exception handling */
> bl exceptions_init
> [..]
>
> Where in lib/arm64/asm/sysreg.h:
>
> #define SCTLR_EL1_RES1 (_BITUL(7) | _BITUL(8) | _BITUL(11) | _BITUL(20) | \
> _BITUL(22) | _BITUL(23) | _BITUL(28) | _BITUL(29))
> #define INIT_SCTLR_EL1_MMU_OFF \
> SCTLR_EL1_RES1
>
> Look like bit 23 (SPAN) should be set.
>
> How are you seeing SCTLR_EL1.SPAN unset?
Yeah. the sctlr_el1.SPAN has always been set by the above flow. So Nadav
you can describe what you encounter with more details. Like which tests
crash you encounter, and how to reproduce it.
Thanks,
Shaoqin
>
> Thanks,
> Alex
>
>>
>> Without setting sctlr_el1.SPAN, tests crash when they access the memory
>> after an exception.
>>
>> Signed-off-by: Nadav Amit <namit@vmware.com>
>> ---
>> arm/cstart64.S | 1 +
>> lib/arm64/asm/sysreg.h | 1 +
>> 2 files changed, 2 insertions(+)
>>
>> diff --git a/arm/cstart64.S b/arm/cstart64.S
>> index 61e27d3..d4cee6f 100644
>> --- a/arm/cstart64.S
>> +++ b/arm/cstart64.S
>> @@ -245,6 +245,7 @@ asm_mmu_enable:
>> orr x1, x1, SCTLR_EL1_C
>> orr x1, x1, SCTLR_EL1_I
>> orr x1, x1, SCTLR_EL1_M
>> + orr x1, x1, SCTLR_EL1_SPAN
>> msr sctlr_el1, x1
>> isb
>>
>> diff --git a/lib/arm64/asm/sysreg.h b/lib/arm64/asm/sysreg.h
>> index 18c4ed3..b9868ff 100644
>> --- a/lib/arm64/asm/sysreg.h
>> +++ b/lib/arm64/asm/sysreg.h
>> @@ -81,6 +81,7 @@ asm(
>>
>> /* System Control Register (SCTLR_EL1) bits */
>> #define SCTLR_EL1_EE (1 << 25)
>> +#define SCTLR_EL1_SPAN (1 << 23)
>> #define SCTLR_EL1_WXN (1 << 19)
>> #define SCTLR_EL1_I (1 << 12)
>> #define SCTLR_EL1_SA0 (1 << 4)
>> --
>> 2.34.1
>>
>>
>
--
Shaoqin
next prev parent reply other threads:[~2023-07-14 11:30 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-17 1:31 [kvm-unit-tests PATCH 0/2] arm64: fix paging issues Nadav Amit
2023-06-17 1:31 ` [kvm-unit-tests PATCH 1/2] arm64: set sctlr_el1.SPAN Nadav Amit
2023-06-25 19:44 ` Nadav Amit
2023-07-07 18:26 ` Nadav Amit
2023-07-14 10:31 ` Alexandru Elisei
2023-07-14 11:29 ` Shaoqin Huang [this message]
2023-07-14 18:42 ` Nadav Amit
2023-07-17 6:50 ` Andrew Jones
2023-07-17 6:52 ` Andrew Jones
2023-07-17 8:53 ` Nikos Nikoleris
2023-07-17 17:05 ` Nadav Amit
2023-07-18 8:44 ` Alexandru Elisei
2023-07-19 5:42 ` Nadav Amit
2023-06-17 1:31 ` [kvm-unit-tests PATCH 2/2] arm64: ensure tlbi is safe Nadav Amit
2023-07-14 10:55 ` Alexandru Elisei
2023-07-14 17:20 ` Nadav Amit
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