From mboxrd@z Thu Jan  1 00:00:00 1970
From: Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: [PATCH v2 3/3] KVM: nVMX: Fix nested APICv Secondary CPU Controls
 when apicv disabled
Date: Fri, 24 Nov 2017 00:57:20 +0100
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On 22/11/2017 18:56, Jim Mattson wrote:
> I don't
> believe that L1 has to have lapic_in_kernel() for L0 to use the APICv
> features of the hardware when running L2.

Without lapic_in_kernel() the guest doesn't have the X2APIC CPUID bit
and x2APIC MSRs (at least on upstream KVM, don't know if Google's
userspace MSR patches can do it).

Therefore it makes no sense to allow the "virtualize APIC accesses"
control for L1, as the control implies the availability of the MSRs.

> I'm also not sure that
> Hyper-V SynIC activation for L1 has any bearing on whether or not L0
> can use the APICv features of the hardware when running L2.

I agree with this.

Paolo