From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from casper.infradead.org (casper.infradead.org [90.155.50.34]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C7E552701DC for ; Fri, 29 Aug 2025 14:05:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=90.155.50.34 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756476313; cv=none; b=OnAWBxdqo2rfvLiyV6fQpcEZbnWwHLmQhOwzSLhnnEV6WuLZaow1m6Q5GYHeimIltEcq6qNswUpxhdBtfCBtc40/jdSNEgwyqLq3VULX827P/sEsFLJmfJJF2djxZAw7kj2sJMCHfB7mu7+OiW8djI6T0BAHScOcsSyvEtPX2O8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756476313; c=relaxed/simple; bh=IFeSx5swle/H5b6NASyGlR8KQRArkNRGKYMbLG24ezA=; h=Message-ID:Subject:From:To:Cc:Date:Content-Type:MIME-Version; b=u1RiW2BSbSoRMSTaGmdD55G0wEnhj6LhL9kyqOcBD+cnYeYu6AV1/DC5sk7DI6UlpEZ+YoS5iyV3lLiFU+uXDqlS28HeI078COYdBt1r42+vG0WFp7LtEJQ88OVj7MxOtUyerXihdI2EMwoVXpDizYjcdgNIyfQGGm6epFEBPLQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=infradead.org; spf=none smtp.mailfrom=casper.srs.infradead.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b=vs4DMyMe; arc=none smtp.client-ip=90.155.50.34 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=infradead.org Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=casper.srs.infradead.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b="vs4DMyMe" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:Date:Cc:To: From:Subject:Message-ID:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:In-Reply-To:References; bh=lAIUJUTzkAwuls3+jeEJSojGD/Rj6dhLVj3jUD0gqoQ=; b=vs4DMyMelavKmOBFB7100qq88H IhPyGFkTajwjjlHz6Ae0OROeoU3Zv/QmGQbwnHGk+ILZwmxOK3TKShjPUIB2Gm9Gz491VayvuML09 OWbMahnfmnfjSERZautJaK4+cut1bHR6hhJT/14gZNcmQ0Y+mmRPSJUZnRDUGv8aYDogV7tRrzhUO nDKwXr1jn2GtLcRo0qsl8sD9tPb4FLW0cddxSAR5zRZfbkm5hGtmIzJfZZ3oLWr9G1r9Hfd9RTnGv PkQ0PatCsoiflV8lTpOFIxonXplSB/U8jugkTLKOu8G5aHmEKp00SCyuAmrBKd0GZt1d3cp8YjcOn 2BSTsgKA==; Received: from 54-240-197-239.amazon.com ([54.240.197.239] helo=u09cd745991455d.ant.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.98.2 #2 (Red Hat Linux)) id 1urzip-0000000CtIW-3snb; Fri, 29 Aug 2025 14:04:56 +0000 Message-ID: <9912a9c26aa322623b09ace7a01c7a86665e147a.camel@infradead.org> Subject: [PATCH] i386/xen: Advertise XEN_HVM_CPUID_EXT_DEST_ID for Xen guests where supported From: David Woodhouse To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Marcelo Tosatti , kvm@vger.kernel.org, xen-devel , Roger Pau =?ISO-8859-1?Q?Monn=E9?= , =?ISO-8859-1?Q?J=FCrgen?= Gross Date: Fri, 29 Aug 2025 15:04:55 +0100 Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-zHLb1MPjvn559jOTiXef" User-Agent: Evolution 3.52.3-0ubuntu1 Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html --=-zHLb1MPjvn559jOTiXef Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable From: David Woodhouse The 15-bit MSI enlightenment which allows for up to 32768 vCPUs without a virtual IOMMU is documented at http://david.woodhou.se/ExtDestId.pdf and has been supported for native KVM guests since QEMU v6.0. Although Xen itself has only defined the CPUID bit and not yet implemented it because of complexity in the interface between QEMU and Xen for MSI handling, there's no reason why it can't work when QEMU/KVM is hosting Xen guests. Advertise it accordingly. Tested with a standard Linux guest (which has supported this under Xen since v5.17) and QEMU command line including -M q35 -smp 4,maxcpus=3D288 -device host-x86_64-cpu,socket-id=3D0,core-id=3D257,thread-id=3D0 -cpu host,+xen-vapic We need +xen-vapic to test it properly, or the guest turns every MSI and I/O APIC interrupt into an event channel. Testing shows that both line interrupts and MSIs can be set affine to the fifth CPU and are delivered correctly. Signed-off-by: David Woodhouse --- target/i386/kvm/kvm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 369626f8c8..1401d7a903 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -2221,6 +2221,7 @@ int kvm_arch_init_vcpu(CPUState *cs) =20 if (cs->kvm_state->xen_version >=3D XEN_VERSION(4, 17)) { c->eax |=3D XEN_HVM_CPUID_UPCALL_VECTOR; + c->eax |=3D XEN_HVM_CPUID_EXT_DEST_ID; } } =20 --=20 2.49.0 --=-zHLb1MPjvn559jOTiXef Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT AlVTMRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5jb20xJDAi BgNVBAMTG0RpZ2lDZXJ0IEFzc3VyZWQgSUQgUm9vdCBDQTAeFw0yNDAxMzAwMDAwMDBaFw0zMTEx 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