[GIT PULL] KVM/riscv changes for 6.17

[GIT PULL] KVM/riscv changes for 6.17

[Anup Patel]

Hi Paolo,

We have the following KVM RISC-V changes for 6.17:
1) Enabled ring-based dirty memory tracking
2) Improved "perf kvm stat" to report interrupt events
3) Delegate illegal instruction trap to VS-mode
4) Added SBI FWFT extension for Guest/VM with misaligned
    delegation and pointer masking PMLEN features
5) MMU related improvements for KVM RISC-V for the
    upcoming nested virtualization support

Please pull.

Regards,
Anup

The following changes since commit 4cec89db80ba81fa4524c6449c0494b8ae08eeb0:

  RISC-V: KVM: Move HGEI[E|P] CSR access to IMSIC virtualization
(2025-07-11 18:33:27 +0530)

are available in the Git repository at:

  https://github.com/kvm-riscv/linux.git tags/kvm-riscv-6.17-1

for you to fetch changes up to 583c7288feb43eb8cbb18d08376d328e9a48e72d:

  RISC-V: KVM: Avoid re-acquiring memslot in kvm_riscv_gstage_map()
(2025-07-23 17:20:41 +0530)

----------------------------------------------------------------
KVM/riscv changes for 6.17

- Enabled ring-based dirty memory tracking
- Improved perf kvm stat to report interrupt events
- Delegate illegal instruction trap to VS-mode
- Added SBI FWFT extension for Guest/VM with misaligned
  delegation and pointer masking PMLEN features
- MMU related improvements for KVM RISC-V for upcoming
  nested virtualization

----------------------------------------------------------------
Anup Patel (12):
      RISC-V: KVM: Check kvm_riscv_vcpu_alloc_vector_context() return value
      RISC-V: KVM: Drop the return value of kvm_riscv_vcpu_aia_init()
      RISC-V: KVM: Rename and move kvm_riscv_local_tlb_sanitize()
      RISC-V: KVM: Replace KVM_REQ_HFENCE_GVMA_VMID_ALL with KVM_REQ_TLB_FLUSH
      RISC-V: KVM: Don't flush TLB when PTE is unchanged
      RISC-V: KVM: Implement kvm_arch_flush_remote_tlbs_range()
      RISC-V: KVM: Use ncsr_xyz() in kvm_riscv_vcpu_trap_redirect()
      RISC-V: KVM: Factor-out MMU related declarations into separate headers
      RISC-V: KVM: Introduce struct kvm_gstage_mapping
      RISC-V: KVM: Add vmid field to struct kvm_riscv_hfence
      RISC-V: KVM: Factor-out g-stage page table management
      RISC-V: KVM: Pass VMID as parameter to kvm_riscv_hfence_xyz() APIs

Clément Léger (4):
      RISC-V: KVM: add SBI extension init()/deinit() functions
      RISC-V: KVM: add SBI extension reset callback
      RISC-V: KVM: add support for FWFT SBI extension
      RISC-V: KVM: add support for SBI_FWFT_MISALIGNED_DELEG

Quan Zhou (4):
      RISC-V: KVM: Enable ring-based dirty memory tracking
      RISC-V: perf/kvm: Add reporting of interrupt events
      RISC-V: KVM: Use find_vma_intersection() to search for intersecting VMAs
      RISC-V: KVM: Avoid re-acquiring memslot in kvm_riscv_gstage_map()

Samuel Holland (2):
      RISC-V: KVM: Fix inclusion of Smnpm in the guest ISA bitmap
      RISC-V: KVM: Add support for SBI_FWFT_POINTER_MASKING_PMLEN

Xu Lu (1):
      RISC-V: KVM: Delegate illegal instruction fault to VS mode

 Documentation/virt/kvm/api.rst                     |   2 +-
 arch/riscv/include/asm/kvm_aia.h                   |   2 +-
 arch/riscv/include/asm/kvm_gstage.h                |  72 +++
 arch/riscv/include/asm/kvm_host.h                  | 109 +----
 arch/riscv/include/asm/kvm_mmu.h                   |  21 +
 arch/riscv/include/asm/kvm_tlb.h                   |  84 ++++
 arch/riscv/include/asm/kvm_vcpu_sbi.h              |  13 +
 arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h         |  33 ++
 arch/riscv/include/asm/kvm_vmid.h                  |  27 ++
 arch/riscv/include/uapi/asm/kvm.h                  |   2 +
 arch/riscv/kvm/Kconfig                             |   1 +
 arch/riscv/kvm/Makefile                            |   2 +
 arch/riscv/kvm/aia_device.c                        |   6 +-
 arch/riscv/kvm/aia_imsic.c                         |  12 +-
 arch/riscv/kvm/gstage.c                            | 338 ++++++++++++++
 arch/riscv/kvm/main.c                              |   3 +-
 arch/riscv/kvm/mmu.c                               | 509 +++++----------------
 arch/riscv/kvm/tlb.c                               | 110 ++---
 arch/riscv/kvm/vcpu.c                              |  48 +-
 arch/riscv/kvm/vcpu_exit.c                         |  20 +-
 arch/riscv/kvm/vcpu_onereg.c                       |  84 ++--
 arch/riscv/kvm/vcpu_sbi.c                          |  53 +++
 arch/riscv/kvm/vcpu_sbi_fwft.c                     | 338 ++++++++++++++
 arch/riscv/kvm/vcpu_sbi_replace.c                  |  17 +-
 arch/riscv/kvm/vcpu_sbi_sta.c                      |   3 +-
 arch/riscv/kvm/vcpu_sbi_v01.c                      |  25 +-
 arch/riscv/kvm/vm.c                                |   7 +-
 arch/riscv/kvm/vmid.c                              |  25 +
 tools/perf/arch/riscv/util/kvm-stat.c              |   6 +-
 tools/perf/arch/riscv/util/riscv_exception_types.h |  35 --
 tools/perf/arch/riscv/util/riscv_trap_types.h      |  57 +++
 31 files changed, 1382 insertions(+), 682 deletions(-)
 create mode 100644 arch/riscv/include/asm/kvm_gstage.h
 create mode 100644 arch/riscv/include/asm/kvm_mmu.h
 create mode 100644 arch/riscv/include/asm/kvm_tlb.h
 create mode 100644 arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h
 create mode 100644 arch/riscv/include/asm/kvm_vmid.h
 create mode 100644 arch/riscv/kvm/gstage.c
 create mode 100644 arch/riscv/kvm/vcpu_sbi_fwft.c
 delete mode 100644 tools/perf/arch/riscv/util/riscv_exception_types.h
 create mode 100644 tools/perf/arch/riscv/util/riscv_trap_types.h

Re: [GIT PULL] KVM/riscv changes for 6.17

[Paolo Bonzini]

On Fri, Jul 25, 2025 at 2:06 PM Anup Patel <anup@brainfault.org> wrote:
>
> Hi Paolo,
>
> We have the following KVM RISC-V changes for 6.17:
> 1) Enabled ring-based dirty memory tracking
> 2) Improved "perf kvm stat" to report interrupt events
> 3) Delegate illegal instruction trap to VS-mode
> 4) Added SBI FWFT extension for Guest/VM with misaligned
>     delegation and pointer masking PMLEN features
> 5) MMU related improvements for KVM RISC-V for the
>     upcoming nested virtualization support
>
> Please pull.

Done, thanks.

Paolo

> Regards,
> Anup
>
> The following changes since commit 4cec89db80ba81fa4524c6449c0494b8ae08eeb0:
>
>   RISC-V: KVM: Move HGEI[E|P] CSR access to IMSIC virtualization
> (2025-07-11 18:33:27 +0530)
>
> are available in the Git repository at:
>
>   https://github.com/kvm-riscv/linux.git tags/kvm-riscv-6.17-1
>
> for you to fetch changes up to 583c7288feb43eb8cbb18d08376d328e9a48e72d:
>
>   RISC-V: KVM: Avoid re-acquiring memslot in kvm_riscv_gstage_map()
> (2025-07-23 17:20:41 +0530)
>
> ----------------------------------------------------------------
> KVM/riscv changes for 6.17
>
> - Enabled ring-based dirty memory tracking
> - Improved perf kvm stat to report interrupt events
> - Delegate illegal instruction trap to VS-mode
> - Added SBI FWFT extension for Guest/VM with misaligned
>   delegation and pointer masking PMLEN features
> - MMU related improvements for KVM RISC-V for upcoming
>   nested virtualization
>
> ----------------------------------------------------------------
> Anup Patel (12):
>       RISC-V: KVM: Check kvm_riscv_vcpu_alloc_vector_context() return value
>       RISC-V: KVM: Drop the return value of kvm_riscv_vcpu_aia_init()
>       RISC-V: KVM: Rename and move kvm_riscv_local_tlb_sanitize()
>       RISC-V: KVM: Replace KVM_REQ_HFENCE_GVMA_VMID_ALL with KVM_REQ_TLB_FLUSH
>       RISC-V: KVM: Don't flush TLB when PTE is unchanged
>       RISC-V: KVM: Implement kvm_arch_flush_remote_tlbs_range()
>       RISC-V: KVM: Use ncsr_xyz() in kvm_riscv_vcpu_trap_redirect()
>       RISC-V: KVM: Factor-out MMU related declarations into separate headers
>       RISC-V: KVM: Introduce struct kvm_gstage_mapping
>       RISC-V: KVM: Add vmid field to struct kvm_riscv_hfence
>       RISC-V: KVM: Factor-out g-stage page table management
>       RISC-V: KVM: Pass VMID as parameter to kvm_riscv_hfence_xyz() APIs
>
> Clément Léger (4):
>       RISC-V: KVM: add SBI extension init()/deinit() functions
>       RISC-V: KVM: add SBI extension reset callback
>       RISC-V: KVM: add support for FWFT SBI extension
>       RISC-V: KVM: add support for SBI_FWFT_MISALIGNED_DELEG
>
> Quan Zhou (4):
>       RISC-V: KVM: Enable ring-based dirty memory tracking
>       RISC-V: perf/kvm: Add reporting of interrupt events
>       RISC-V: KVM: Use find_vma_intersection() to search for intersecting VMAs
>       RISC-V: KVM: Avoid re-acquiring memslot in kvm_riscv_gstage_map()
>
> Samuel Holland (2):
>       RISC-V: KVM: Fix inclusion of Smnpm in the guest ISA bitmap
>       RISC-V: KVM: Add support for SBI_FWFT_POINTER_MASKING_PMLEN
>
> Xu Lu (1):
>       RISC-V: KVM: Delegate illegal instruction fault to VS mode
>
>  Documentation/virt/kvm/api.rst                     |   2 +-
>  arch/riscv/include/asm/kvm_aia.h                   |   2 +-
>  arch/riscv/include/asm/kvm_gstage.h                |  72 +++
>  arch/riscv/include/asm/kvm_host.h                  | 109 +----
>  arch/riscv/include/asm/kvm_mmu.h                   |  21 +
>  arch/riscv/include/asm/kvm_tlb.h                   |  84 ++++
>  arch/riscv/include/asm/kvm_vcpu_sbi.h              |  13 +
>  arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h         |  33 ++
>  arch/riscv/include/asm/kvm_vmid.h                  |  27 ++
>  arch/riscv/include/uapi/asm/kvm.h                  |   2 +
>  arch/riscv/kvm/Kconfig                             |   1 +
>  arch/riscv/kvm/Makefile                            |   2 +
>  arch/riscv/kvm/aia_device.c                        |   6 +-
>  arch/riscv/kvm/aia_imsic.c                         |  12 +-
>  arch/riscv/kvm/gstage.c                            | 338 ++++++++++++++
>  arch/riscv/kvm/main.c                              |   3 +-
>  arch/riscv/kvm/mmu.c                               | 509 +++++----------------
>  arch/riscv/kvm/tlb.c                               | 110 ++---
>  arch/riscv/kvm/vcpu.c                              |  48 +-
>  arch/riscv/kvm/vcpu_exit.c                         |  20 +-
>  arch/riscv/kvm/vcpu_onereg.c                       |  84 ++--
>  arch/riscv/kvm/vcpu_sbi.c                          |  53 +++
>  arch/riscv/kvm/vcpu_sbi_fwft.c                     | 338 ++++++++++++++
>  arch/riscv/kvm/vcpu_sbi_replace.c                  |  17 +-
>  arch/riscv/kvm/vcpu_sbi_sta.c                      |   3 +-
>  arch/riscv/kvm/vcpu_sbi_v01.c                      |  25 +-
>  arch/riscv/kvm/vm.c                                |   7 +-
>  arch/riscv/kvm/vmid.c                              |  25 +
>  tools/perf/arch/riscv/util/kvm-stat.c              |   6 +-
>  tools/perf/arch/riscv/util/riscv_exception_types.h |  35 --
>  tools/perf/arch/riscv/util/riscv_trap_types.h      |  57 +++
>  31 files changed, 1382 insertions(+), 682 deletions(-)
>  create mode 100644 arch/riscv/include/asm/kvm_gstage.h
>  create mode 100644 arch/riscv/include/asm/kvm_mmu.h
>  create mode 100644 arch/riscv/include/asm/kvm_tlb.h
>  create mode 100644 arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h
>  create mode 100644 arch/riscv/include/asm/kvm_vmid.h
>  create mode 100644 arch/riscv/kvm/gstage.c
>  create mode 100644 arch/riscv/kvm/vcpu_sbi_fwft.c
>  delete mode 100644 tools/perf/arch/riscv/util/riscv_exception_types.h
>  create mode 100644 tools/perf/arch/riscv/util/riscv_trap_types.h
>

Re: [GIT PULL] KVM/riscv changes for 6.17

[Paolo Bonzini]

On Fri, Jul 25, 2025 at 2:06 PM Anup Patel <anup@brainfault.org> wrote:
>       RISC-V: perf/kvm: Add reporting of interrupt events

Something here ate Quan Zhou's Signed-off-by line, which is present at
https://lore.kernel.org/r/9693132df4d0f857b8be3a75750c36b40213fcc0.1726211632.git.zhouquan@iscas.ac.cn
but not in your branch.

Paolo

>       RISC-V: KVM: Use find_vma_intersection() to search for intersecting VMAs
>       RISC-V: KVM: Avoid re-acquiring memslot in kvm_riscv_gstage_map()
>
> Samuel Holland (2):
>       RISC-V: KVM: Fix inclusion of Smnpm in the guest ISA bitmap
>       RISC-V: KVM: Add support for SBI_FWFT_POINTER_MASKING_PMLEN
>
> Xu Lu (1):
>       RISC-V: KVM: Delegate illegal instruction fault to VS mode
>
>  Documentation/virt/kvm/api.rst                     |   2 +-
>  arch/riscv/include/asm/kvm_aia.h                   |   2 +-
>  arch/riscv/include/asm/kvm_gstage.h                |  72 +++
>  arch/riscv/include/asm/kvm_host.h                  | 109 +----
>  arch/riscv/include/asm/kvm_mmu.h                   |  21 +
>  arch/riscv/include/asm/kvm_tlb.h                   |  84 ++++
>  arch/riscv/include/asm/kvm_vcpu_sbi.h              |  13 +
>  arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h         |  33 ++
>  arch/riscv/include/asm/kvm_vmid.h                  |  27 ++
>  arch/riscv/include/uapi/asm/kvm.h                  |   2 +
>  arch/riscv/kvm/Kconfig                             |   1 +
>  arch/riscv/kvm/Makefile                            |   2 +
>  arch/riscv/kvm/aia_device.c                        |   6 +-
>  arch/riscv/kvm/aia_imsic.c                         |  12 +-
>  arch/riscv/kvm/gstage.c                            | 338 ++++++++++++++
>  arch/riscv/kvm/main.c                              |   3 +-
>  arch/riscv/kvm/mmu.c                               | 509 +++++----------------
>  arch/riscv/kvm/tlb.c                               | 110 ++---
>  arch/riscv/kvm/vcpu.c                              |  48 +-
>  arch/riscv/kvm/vcpu_exit.c                         |  20 +-
>  arch/riscv/kvm/vcpu_onereg.c                       |  84 ++--
>  arch/riscv/kvm/vcpu_sbi.c                          |  53 +++
>  arch/riscv/kvm/vcpu_sbi_fwft.c                     | 338 ++++++++++++++
>  arch/riscv/kvm/vcpu_sbi_replace.c                  |  17 +-
>  arch/riscv/kvm/vcpu_sbi_sta.c                      |   3 +-
>  arch/riscv/kvm/vcpu_sbi_v01.c                      |  25 +-
>  arch/riscv/kvm/vm.c                                |   7 +-
>  arch/riscv/kvm/vmid.c                              |  25 +
>  tools/perf/arch/riscv/util/kvm-stat.c              |   6 +-
>  tools/perf/arch/riscv/util/riscv_exception_types.h |  35 --
>  tools/perf/arch/riscv/util/riscv_trap_types.h      |  57 +++
>  31 files changed, 1382 insertions(+), 682 deletions(-)
>  create mode 100644 arch/riscv/include/asm/kvm_gstage.h
>  create mode 100644 arch/riscv/include/asm/kvm_mmu.h
>  create mode 100644 arch/riscv/include/asm/kvm_tlb.h
>  create mode 100644 arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h
>  create mode 100644 arch/riscv/include/asm/kvm_vmid.h
>  create mode 100644 arch/riscv/kvm/gstage.c
>  create mode 100644 arch/riscv/kvm/vcpu_sbi_fwft.c
>  delete mode 100644 tools/perf/arch/riscv/util/riscv_exception_types.h
>  create mode 100644 tools/perf/arch/riscv/util/riscv_trap_types.h
>

Re: [GIT PULL] KVM/riscv changes for 6.17

[Anup Patel]

On Mon, Jul 28, 2025 at 9:22 PM Paolo Bonzini <pbonzini@redhat.com> wrote:
>
> On Fri, Jul 25, 2025 at 2:06 PM Anup Patel <anup@brainfault.org> wrote:
> >       RISC-V: perf/kvm: Add reporting of interrupt events
>
> Something here ate Quan Zhou's Signed-off-by line, which is present at
> https://lore.kernel.org/r/9693132df4d0f857b8be3a75750c36b40213fcc0.1726211632.git.zhouquan@iscas.ac.cn
> but not in your branch.

There were couple of "---" lines in patch description which
created problems for me so I tried fixing manually and
accidentally ate Signed-off-by.

Sorry about that.

Regards,
Anup

>
> Paolo
>
> >       RISC-V: KVM: Use find_vma_intersection() to search for intersecting VMAs
> >       RISC-V: KVM: Avoid re-acquiring memslot in kvm_riscv_gstage_map()
> >
> > Samuel Holland (2):
> >       RISC-V: KVM: Fix inclusion of Smnpm in the guest ISA bitmap
> >       RISC-V: KVM: Add support for SBI_FWFT_POINTER_MASKING_PMLEN
> >
> > Xu Lu (1):
> >       RISC-V: KVM: Delegate illegal instruction fault to VS mode
> >
> >  Documentation/virt/kvm/api.rst                     |   2 +-
> >  arch/riscv/include/asm/kvm_aia.h                   |   2 +-
> >  arch/riscv/include/asm/kvm_gstage.h                |  72 +++
> >  arch/riscv/include/asm/kvm_host.h                  | 109 +----
> >  arch/riscv/include/asm/kvm_mmu.h                   |  21 +
> >  arch/riscv/include/asm/kvm_tlb.h                   |  84 ++++
> >  arch/riscv/include/asm/kvm_vcpu_sbi.h              |  13 +
> >  arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h         |  33 ++
> >  arch/riscv/include/asm/kvm_vmid.h                  |  27 ++
> >  arch/riscv/include/uapi/asm/kvm.h                  |   2 +
> >  arch/riscv/kvm/Kconfig                             |   1 +
> >  arch/riscv/kvm/Makefile                            |   2 +
> >  arch/riscv/kvm/aia_device.c                        |   6 +-
> >  arch/riscv/kvm/aia_imsic.c                         |  12 +-
> >  arch/riscv/kvm/gstage.c                            | 338 ++++++++++++++
> >  arch/riscv/kvm/main.c                              |   3 +-
> >  arch/riscv/kvm/mmu.c                               | 509 +++++----------------
> >  arch/riscv/kvm/tlb.c                               | 110 ++---
> >  arch/riscv/kvm/vcpu.c                              |  48 +-
> >  arch/riscv/kvm/vcpu_exit.c                         |  20 +-
> >  arch/riscv/kvm/vcpu_onereg.c                       |  84 ++--
> >  arch/riscv/kvm/vcpu_sbi.c                          |  53 +++
> >  arch/riscv/kvm/vcpu_sbi_fwft.c                     | 338 ++++++++++++++
> >  arch/riscv/kvm/vcpu_sbi_replace.c                  |  17 +-
> >  arch/riscv/kvm/vcpu_sbi_sta.c                      |   3 +-
> >  arch/riscv/kvm/vcpu_sbi_v01.c                      |  25 +-
> >  arch/riscv/kvm/vm.c                                |   7 +-
> >  arch/riscv/kvm/vmid.c                              |  25 +
> >  tools/perf/arch/riscv/util/kvm-stat.c              |   6 +-
> >  tools/perf/arch/riscv/util/riscv_exception_types.h |  35 --
> >  tools/perf/arch/riscv/util/riscv_trap_types.h      |  57 +++
> >  31 files changed, 1382 insertions(+), 682 deletions(-)
> >  create mode 100644 arch/riscv/include/asm/kvm_gstage.h
> >  create mode 100644 arch/riscv/include/asm/kvm_mmu.h
> >  create mode 100644 arch/riscv/include/asm/kvm_tlb.h
> >  create mode 100644 arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h
> >  create mode 100644 arch/riscv/include/asm/kvm_vmid.h
> >  create mode 100644 arch/riscv/kvm/gstage.c
> >  create mode 100644 arch/riscv/kvm/vcpu_sbi_fwft.c
> >  delete mode 100644 tools/perf/arch/riscv/util/riscv_exception_types.h
> >  create mode 100644 tools/perf/arch/riscv/util/riscv_trap_types.h
> >
>

Re: [GIT PULL] KVM/riscv changes for 6.17

[Paolo Bonzini]

On Mon, Jul 28, 2025 at 5:55 PM Anup Patel <anup@brainfault.org> wrote:
>
> On Mon, Jul 28, 2025 at 9:22 PM Paolo Bonzini <pbonzini@redhat.com> wrote:
> >
> > On Fri, Jul 25, 2025 at 2:06 PM Anup Patel <anup@brainfault.org> wrote:
> > >       RISC-V: perf/kvm: Add reporting of interrupt events
> >
> > Something here ate Quan Zhou's Signed-off-by line, which is present at
> > https://lore.kernel.org/r/9693132df4d0f857b8be3a75750c36b40213fcc0.1726211632.git.zhouquan@iscas.ac.cn
> > but not in your branch.
>
> There were couple of "---" lines in patch description which
> created problems for me so I tried fixing manually and
> accidentally ate Signed-off-by.
>
> Sorry about that.

No problem. Another (and more important) question, for SBI FWFT I
don't see any way for userspace to 1) pick which features are
available 2) retrieve the state and put it back into KVM. Am I missing
something?

Paolo

Re: [GIT PULL] KVM/riscv changes for 6.17

[Anup Patel]

On Mon, Jul 28, 2025 at 9:43 PM Paolo Bonzini <pbonzini@redhat.com> wrote:
>
> On Mon, Jul 28, 2025 at 5:55 PM Anup Patel <anup@brainfault.org> wrote:
> >
> > On Mon, Jul 28, 2025 at 9:22 PM Paolo Bonzini <pbonzini@redhat.com> wrote:
> > >
> > > On Fri, Jul 25, 2025 at 2:06 PM Anup Patel <anup@brainfault.org> wrote:
> > > >       RISC-V: perf/kvm: Add reporting of interrupt events
> > >
> > > Something here ate Quan Zhou's Signed-off-by line, which is present at
> > > https://lore.kernel.org/r/9693132df4d0f857b8be3a75750c36b40213fcc0.1726211632.git.zhouquan@iscas.ac.cn
> > > but not in your branch.
> >
> > There were couple of "---" lines in patch description which
> > created problems for me so I tried fixing manually and
> > accidentally ate Signed-off-by.
> >
> > Sorry about that.
>
> No problem. Another (and more important) question, for SBI FWFT I
> don't see any way for userspace to 1) pick which features are
> available 2) retrieve the state and put it back into KVM. Am I missing
> something?

Currently, userspace only has a way to enable/disable the entire
SBI FWFT extension. We definitely need to extend ONE_REG
interface to allow userspace save/restore SBI FWFT state. I am
sure this will happen pretty soon (probably next merge window).

At the moment, I am not sure whether userspace also needs a
way to enable/disable individual features of SBI FWFT extension.
What do you think ?

Regards,
Anup

Re: [GIT PULL] KVM/riscv changes for 6.17

[Paolo Bonzini]

Il lun 28 lug 2025, 18:21 Anup Patel <apatel@ventanamicro.com> ha scritto:
>
> Currently, userspace only has a way to enable/disable the entire
> SBI FWFT extension. We definitely need to extend ONE_REG
> interface to allow userspace save/restore SBI FWFT state. I am
> sure this will happen pretty soon (probably next merge window).
>
> At the moment, I am not sure whether userspace also needs a
> way to enable/disable individual features of SBI FWFT extension.
> What do you think ?

Yes, you do. FWFT extensions are equivalent to CPU extensions. But all
this should have been done before including Clement's work. Without it
userspace has no way to support FWFT.

Drew, I see you have Reviewed-by on the patches; please keep an eye on
this stuff.

Can you respin with the fix to the SoB line and no FWFT support?

Thanks,

Paolo

>
> Regards,
> Anup
>

Re: [GIT PULL] KVM/riscv changes for 6.17

[Anup Patel]

On Mon, Jul 28, 2025 at 10:20 PM Paolo Bonzini <pbonzini@redhat.com> wrote:
>
> Il lun 28 lug 2025, 18:21 Anup Patel <apatel@ventanamicro.com> ha scritto:
> >
> > Currently, userspace only has a way to enable/disable the entire
> > SBI FWFT extension. We definitely need to extend ONE_REG
> > interface to allow userspace save/restore SBI FWFT state. I am
> > sure this will happen pretty soon (probably next merge window).
> >
> > At the moment, I am not sure whether userspace also needs a
> > way to enable/disable individual features of SBI FWFT extension.
> > What do you think ?
>
> Yes, you do. FWFT extensions are equivalent to CPU extensions. But all
> this should have been done before including Clement's work. Without it
> userspace has no way to support FWFT.
>
> Drew, I see you have Reviewed-by on the patches; please keep an eye on
> this stuff.
>
> Can you respin with the fix to the SoB line and no FWFT support?

Sure, I will send v2 PR.

Regards,
Anup

Re: [GIT PULL] KVM/riscv changes for 6.17

[Radim Krčmář]

2025-07-28T18:50:10+02:00, Paolo Bonzini <pbonzini@redhat.com>:
> Il lun 28 lug 2025, 18:21 Anup Patel <apatel@ventanamicro.com> ha scritto:
>> Currently, userspace only has a way to enable/disable the entire
>> SBI FWFT extension. We definitely need to extend ONE_REG
>> interface to allow userspace save/restore SBI FWFT state. I am
>> sure this will happen pretty soon (probably next merge window).
>>
>> At the moment, I am not sure whether userspace also needs a
>> way to enable/disable individual features of SBI FWFT extension.
>> What do you think ?
>
> Yes, you do. FWFT extensions are equivalent to CPU extensions. But all
> this should have been done before including Clement's work. Without it
> userspace has no way to support FWFT.
>
> Drew, I see you have Reviewed-by on the patches; please keep an eye on
> this stuff.

Sorry, I didn't try too hard to convince others after noticing it, and
planned to fix the most significant breakage in later rcs.
(If FWFT wasn't enabled by default, sane userspace just wouldn't expose
 FWFT to the guest until a proper KVM configuration was added).

Re: [GIT PULL] KVM/riscv changes for 6.17

[Paolo Bonzini]

On 7/29/25 13:37, Radim Krčmář wrote:
> Sorry, I didn't try too hard to convince others after noticing it, and
> planned to fix the most significant breakage in later rcs.

You shouldn't have to convince anyone, 
Documentation/virt/kvm/review-checklist.rst is pretty clear: new state 
must include support for save/restore, new features must default to off, 
and the feature should be testable.

The file was just updated (and now makes further remarks about testing), 
but the same things were basically in the older version.

So you need:

- a KVM_ENABLE_CAP to enable/disable FWFT

- an ioctl to get the list of FWFT features (kind of like 
KVM_GET_MSR_INDEX_LIST on x86?  It seems unlikely that you get more than 
50 or 60)

- an ioctl to enable/disable FWFT individual features

- the GET/SET_ONE_REG to migrate the state etc.

- selftests


> (If FWFT wasn't enabled by default, sane userspace just wouldn't expose
>   FWFT to the guest until a proper KVM configuration was added).

That means that the bare minimum for inclusion in KVM is the first three 
bullets above.  But at this point, leaving out the fourth is just 
sloppy; and tests are not really optional unless you have already posted 
a userspace implementation.

Thanks,

Paolo

Re: [GIT PULL] KVM/riscv changes for 6.17

[Anup Patel]

On Tue, Jul 29, 2025 at 5:29 PM Paolo Bonzini <pbonzini@redhat.com> wrote:
>
> On 7/29/25 13:37, Radim Krčmář wrote:
> > Sorry, I didn't try too hard to convince others after noticing it, and
> > planned to fix the most significant breakage in later rcs.
>
> You shouldn't have to convince anyone,
> Documentation/virt/kvm/review-checklist.rst is pretty clear: new state
> must include support for save/restore, new features must default to off,
> and the feature should be testable.
>
> The file was just updated (and now makes further remarks about testing),
> but the same things were basically in the older version.
>
> So you need:
>
> - a KVM_ENABLE_CAP to enable/disable FWFT

We don't need separate KVM CAP for every SBI extension
since we already have the SBI ONE_REG interface to
enable/disable individual SBI extensions.

>
> - an ioctl to get the list of FWFT features (kind of like
> KVM_GET_MSR_INDEX_LIST on x86?  It seems unlikely that you get more than
> 50 or 60)
>
> - an ioctl to enable/disable FWFT individual features
>
> - the GET/SET_ONE_REG to migrate the state etc.
>
> - selftests
>

These things need to be added anyway since we have it
for other SBI extensions.

Regards,
Anup