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[14.203.144.223]) by smtp.gmail.com with ESMTPSA id w5-20020a170902d70500b001ac94b33ab1sm4164815ply.304.2023.06.14.20.02.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 14 Jun 2023 20:02:40 -0700 (PDT) Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Thu, 15 Jun 2023 13:02:34 +1000 Message-Id: From: "Nicholas Piggin" To: "Joel Stanley" Cc: , "Laurent Vivier" , "Thomas Huth" , , , Subject: Re: [kvm-unit-tests v4 00/12] powerpc: updates, P10, PNV support X-Mailer: aerc 0.14.0 References: <20230608075826.86217-1-npiggin@gmail.com> In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Wed Jun 14, 2023 at 11:09 AM AEST, Joel Stanley wrote: > On Thu, 8 Jun 2023 at 07:58, Nicholas Piggin wrote: > > > > Posting again, a couple of patches were merged and accounted for review > > comments from last time. > > I saw some failures in the spr tests running on a power9 powernv system: > > $ TESTNAME=3Dsprs TIMEOUT=3D90s ACCEL=3D ./powerpc/run powerpc/sprs.elf -= smp > 1 |grep FAIL > FAIL: WORT ( 895): 0x00000000c0deba80 <=3D=3D> 0x0000000000000000 This is just TCG machine? I'm not sure why WORT fails, AFAIKS it's the same on POWER8 and doesn't do anything just a simple register. I think on real hardware WORT may not have any bits implemented on POWER9 though. > $ MIGRATION=3Dyes TESTNAME=3Dsprs-migration TIMEOUT=3D90s ACCEL=3D > ./powerpc/run powerpc/sprs.elf -smp 1 -append '-w' | grep FAIL > FAIL: SRR0 ( 26): 0xcafefacec0debabc <=3D=3D> 0x0000000000402244 > FAIL: SRR1 ( 27): 0xc0000006409ebab6 <=3D=3D> 0x8000000000001001 > FAIL: CTRL ( 136): 0x00000000 <=3D=3D> 0x00008001 > FAIL: WORT ( 895): 0x00000000c0deba80 <=3D=3D> 0x0000000000000000 > FAIL: PIR (1023): 0x00000010 <=3D=3D> 0x00000049 > > Linux 6.2.0-20-generic > QEMU emulator version 7.2.0 (Debian 1:7.2+dfsg-5ubuntu2) > > On a power8 powernv: > > MIGRATION=3Dyes TESTNAME=3Dsprs-migration TIMEOUT=3D90s ACCEL=3D ./powerp= c/run > powerpc/sprs.elf -smp 1 -append '-w' |grep FAIL > FAIL: SRR0 ( 26): 0xcafefacec0debabc <=3D=3D> 0x0000000000402234 > FAIL: SRR1 ( 27): 0xc0000006409ebab6 <=3D=3D> 0x8000000000001000 > FAIL: CTRL ( 136): 0x00000000 <=3D=3D> 0x00008001 > FAIL: PIR (1023): 0x00000060 <=3D=3D> 0x00000030 Hmm, seems we take some interrupt over migration test that is not accounted for (could check the address in SRR0 to see where it is). Either need to prevent that interrupt or avoid failing on SRR0/1 on this test. Interesting about CTRL, I wonder if that not migrating correctly. PIR looks like a migration issue as well, it can't be changed so destination CPU has got a different PIR. I would be inclined to leave those as failing to remind us to look into them. I'll take a look at the others though. Thanks, Nick