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From: "Radim Krčmář" <rkrcmar@ventanamicro.com>
To: "Anup Patel" <anup@brainfault.org>
Cc: <kvm-riscv@lists.infradead.org>, <kvm@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	"Atish Patra" <atishp@atishpatra.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Alexandre Ghiti" <alex@ghiti.fr>,
	"Andrew Jones" <ajones@ventanamicro.com>,
	"Mayuresh Chitale" <mchitale@ventanamicro.com>
Subject: Re: [PATCH 4/5] KVM: RISC-V: reset VCPU state when becoming runnable
Date: Mon, 28 Apr 2025 19:45:41 +0200	[thread overview]
Message-ID: <D9IGJR9DGFAM.1PVHVOOTVRFZW@ventanamicro.com> (raw)
In-Reply-To: <CAAhSdy0e3HVN6pX-hcX2N+kpwsupsCf6BqrYq=bvtwtFOuEVhA@mail.gmail.com>

2025-04-28T17:52:25+05:30, Anup Patel <anup@brainfault.org>:
> On Thu, Apr 3, 2025 at 5:02 PM Radim Krčmář <rkrcmar@ventanamicro.com> wrote:
>> For a cleaner solution, we should add interfaces to perform the KVM-SBI
>> reset request on userspace demand.  I think it would also be much better
>> if userspace was in control of the post-reset state.
>
> Apart from breaking KVM user-space, this patch is incorrect and
> does not align with the:
> 1) SBI spec
> 2) OS boot protocol.
>
> The SBI spec only defines the entry state of certain CPU registers
> (namely, PC, A0, and A1) when CPU enters S-mode:
> 1) Upon SBI HSM start call from some other CPU
> 2) Upon resuming from non-retentive SBI HSM suspend or
>     SBI system suspend
>
> The S-mode entry state of the boot CPU is defined by the
> OS boot protocol and not by the SBI spec. Due to this, reason
> KVM RISC-V expects user-space to set up the S-mode entry
> state of the boot CPU upon system reset.

We can handle the initial state consistency in other patches.
What needs addressing is a way to trigger the KVM reset from userspace,
even if only to clear the internal KVM state.

I think mp_state is currently the best signalization that KVM should
reset, so I added it there.

What would be your preferred interface for that?

Thanks.


  reply	other threads:[~2025-04-28 17:45 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-03 11:25 [PATCH 0/5] KVM: RISC-V: VCPU reset fixes Radim Krčmář
2025-04-03 11:25 ` [PATCH 1/5] KVM: RISC-V: refactor vector state reset Radim Krčmář
2025-04-25 12:56   ` Andrew Jones
2025-05-07 11:43   ` Anup Patel
2025-04-03 11:25 ` [PATCH 2/5] KVM: RISC-V: refactor sbi reset request Radim Krčmář
2025-04-25 12:58   ` Andrew Jones
2025-05-07 12:01   ` Anup Patel
2025-05-07 17:28     ` Radim Krčmář
2025-05-08  5:02       ` Anup Patel
2025-04-03 11:25 ` [PATCH 3/5] KVM: RISC-V: remove unnecessary SBI reset state Radim Krčmář
2025-04-25 13:05   ` Andrew Jones
2025-04-28 12:16   ` Anup Patel
2025-04-28 18:00     ` Radim Krčmář
2025-04-29  5:50       ` Anup Patel
2025-05-08  6:18   ` Anup Patel
2025-05-08 10:02     ` Radim Krčmář
2025-05-08 13:11       ` Anup Patel
2025-04-03 11:25 ` [PATCH 4/5] KVM: RISC-V: reset VCPU state when becoming runnable Radim Krčmář
2025-04-25 13:26   ` Andrew Jones
2025-04-25 16:04     ` Radim Krčmář
2025-04-28 12:22   ` Anup Patel
2025-04-28 17:45     ` Radim Krčmář [this message]
2025-04-29  5:55       ` Anup Patel
2025-04-29 10:25         ` Radim Krčmář
2025-04-29 15:01           ` Anup Patel
2025-04-29 16:21             ` Radim Krčmář
2025-04-30  4:22               ` Anup Patel
2025-04-30  5:26                 ` Anup Patel
2025-04-30  8:29                   ` Radim Krčmář
2025-04-30 10:17                     ` Anup Patel
2025-04-30 11:45                       ` Radim Krčmář
2025-04-30 13:02                         ` Anup Patel
2025-04-30 14:38                           ` Radim Krčmář
2025-04-03 11:25 ` [PATCH 5/5] KVM: RISC-V: reset smstateen CSRs Radim Krčmář
2025-04-25 12:38   ` Anup Patel

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