From: "Radim Krčmář" <rkrcmar@ventanamicro.com>
To: <fangyu.yu@linux.alibaba.com>, <anup@brainfault.org>,
<atish.patra@linux.dev>, <paul.walmsley@sifive.com>,
<palmer@dabbelt.com>, <aou@eecs.berkeley.edu>, <alex@ghiti.fr>
Cc: <guoren@linux.alibaba.com>, <kvm@vger.kernel.org>,
<kvm-riscv@lists.infradead.org>,
<linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
"linux-riscv" <linux-riscv-bounces@lists.infradead.org>
Subject: Re: [PATCH] RISC-V: KVM: Using user-mode pte within kvm_riscv_gstage_ioremap
Date: Fri, 08 Aug 2025 13:35:11 +0200 [thread overview]
Message-ID: <DBX0JNR61UNM.Z42YERAKRFR8@ventanamicro.com> (raw)
In-Reply-To: <20250807070729.89701-1-fangyu.yu@linux.alibaba.com>
2025-08-07T15:07:29+08:00, <fangyu.yu@linux.alibaba.com>:
> From: Fangyu Yu <fangyu.yu@linux.alibaba.com>
>
> Currently we use kvm_riscv_gstage_ioremap to map IMSIC gpa to the spa of
^^^
hpa?
> guest interrupt file within IMSIC.
>
> The PAGE_KERNEL_IO property does not include user mode settings, so when
> accessing the IMSIC address in the virtual machine, a guest page fault
> will occur, this is not expected.
PAGE_KERNEL_IO also set the reserved G bit, so you're fixing two issues
with a single change. :)
> According to the RISC-V Privileged Architecture Spec, for G-stage address
> translation, all memory accesses are considered to be user-level accesses
> as though executed in Umode.
What implementation are you using? I would have assume that the
original code was tested on QEMU, so we might have a bug there.
> Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
> ---
> diff --git a/arch/riscv/kvm/mmu.c b/arch/riscv/kvm/mmu.c
> @@ -359,8 +360,11 @@ int kvm_riscv_gstage_ioremap(struct kvm *kvm, gpa_t gpa,
> end = (gpa + size + PAGE_SIZE - 1) & PAGE_MASK;
> pfn = __phys_to_pfn(hpa);
>
> + prot = pgprot_noncached(PAGE_WRITE);
> +
> for (addr = gpa; addr < end; addr += PAGE_SIZE) {
> - pte = pfn_pte(pfn, PAGE_KERNEL_IO);
> + pte = pfn_pte(pfn, prot);
> + pte = pte_mkdirty(pte);
Is it necessary to dirty the pte?
It was dirtied before, so it definitely doesn't hurt,
Reviewed-by: Radim Krčmář <rkrcmar@ventanamicro.com>
Thanks.
next prev parent reply other threads:[~2025-08-08 11:35 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-07 7:07 [PATCH] RISC-V: KVM: Using user-mode pte within kvm_riscv_gstage_ioremap fangyu.yu
2025-08-08 3:09 ` Nutty.Liu
2025-08-08 11:35 ` Radim Krčmář [this message]
2025-08-09 3:20 ` fangyu.yu
2025-08-12 13:22 ` Radim Krčmář
2025-08-18 14:18 ` Anup Patel
2025-08-19 1:25 ` fangyu.yu
2025-08-19 9:57 ` Anup Patel
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