From: Brendan Jackman <jackmanb@google.com>
To: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>,
Sean Christopherson <seanjc@google.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>, <kvm@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
Brendan Jackman <jackmanb@google.com>
Subject: Re: [PATCH v3 1/4] KVM: VMX: Flush CPU buffers as needed if L1D cache flush is skipped
Date: Wed, 22 Oct 2025 01:59:16 +0000 [thread overview]
Message-ID: <DDOH9JW22RZ9.3BMRT1XHHJAVL@google.com> (raw)
In-Reply-To: <20251021231831.lofzy6frinusrd5s@desk>
On Tue Oct 21, 2025 at 11:18 PM UTC, Pawan Gupta wrote:
> On Thu, Oct 16, 2025 at 01:04:14PM -0700, Sean Christopherson wrote:
>> If the L1D flush for L1TF is conditionally enabled, flush CPU buffers to
>> mitigate MMIO Stale Data as needed if KVM skips the L1D flush, e.g.
>> because none of the "heavy" paths that trigger an L1D flush were tripped
>> since the last VM-Enter.
>>
>> Note, the flaw goes back to the introduction of the MDS mitigation.
>
> I don't think it is a flaw. If L1D flush was skipped because VMexit did not
> touch any interested data, then there shouldn't be any need to flush CPU
> buffers.
>
> Secondly, when L1D flush is skipped, flushing MDS affected buffers is of no
> use, because the data could still be extracted from L1D cache using L1TF.
> Isn't it?
This is assuming an equivalence between what L1TF and MMIO Stale Data
exploits can do, that isn't really captured in the code/documentation
IMO. This probably felt much more obvious when the vulns were new...
I dunno, in the end this definitely doesn't seem like a terrifying big
deal, I'm not saying the current behaviour is crazy or anything, it's
just slightly surprising and people with sophisticated opinions about
this might not be getting what they think they are out of the default
setup.
But I have no evidence that these sophisticated dissidents actually
exist, maybe just adding commentary about this rationale is more than
good enough here.
next prev parent reply other threads:[~2025-10-22 1:59 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-16 20:04 [PATCH v3 0/4] KVM: VMX: Unify L1D flush for L1TF Sean Christopherson
2025-10-16 20:04 ` [PATCH v3 1/4] KVM: VMX: Flush CPU buffers as needed if L1D cache flush is skipped Sean Christopherson
2025-10-21 13:34 ` Brendan Jackman
2025-10-21 16:48 ` Sean Christopherson
2025-10-21 23:30 ` Pawan Gupta
2025-10-22 1:20 ` Pawan Gupta
2025-10-27 22:03 ` Jim Mattson
2025-10-27 23:17 ` Pawan Gupta
2025-10-27 23:58 ` Jim Mattson
2025-10-28 0:19 ` Pawan Gupta
2025-10-28 0:49 ` Pawan Gupta
2025-10-27 21:09 ` Pawan Gupta
2025-10-21 23:18 ` Pawan Gupta
2025-10-22 1:59 ` Brendan Jackman [this message]
2025-10-22 15:04 ` Sean Christopherson
2025-10-16 20:04 ` [PATCH v3 2/4] KVM: VMX: Bundle all L1 data cache flush mitigation code together Sean Christopherson
2025-10-21 13:38 ` Brendan Jackman
2025-10-16 20:04 ` [PATCH v3 3/4] KVM: VMX: Disable L1TF L1 data cache flush if CONFIG_CPU_MITIGATIONS=n Sean Christopherson
2025-10-22 1:36 ` Pawan Gupta
2025-10-22 15:06 ` Sean Christopherson
2025-10-16 20:04 ` [PATCH v3 4/4] KVM: x86: Unify L1TF flushing under per-CPU variable Sean Christopherson
2025-10-22 1:59 ` Pawan Gupta
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