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From: Sean Christopherson <seanjc@google.com>
To: Yu Zhang <yu.c.zhang@linux.intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
	Vitaly Kuznetsov <vkuznets@redhat.com>,
	kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	Maxim Levitsky <mlevitsk@redhat.com>
Subject: Re: [PATCH 08/12] KVM: nSVM: Use KVM-governed feature framework to track "vVM{SAVE,LOAD} enabled"
Date: Fri, 24 Feb 2023 08:16:40 -0800	[thread overview]
Message-ID: <Y/ji6MAlEmbNfZzf@google.com> (raw)
In-Reply-To: <20230224092552.6olrcx2ryo4sexxm@linux.intel.com>

On Fri, Feb 24, 2023, Yu Zhang wrote:
> On Wed, Feb 22, 2023 at 08:39:01AM -0800, Sean Christopherson wrote:
> > +Maxim
> > 
> > On Wed, Feb 22, 2023, Yu Zhang wrote:
> > > On Tue, Feb 21, 2023 at 03:48:07PM -0800, Sean Christopherson wrote:
> > Nope, my interpretation is wrong.  vmload_vmsave_interception() clears the upper
> > bits of SYSENTER_{EIP,ESP}
> > 
> > 	if (vmload) {
> > 		svm_copy_vmloadsave_state(svm->vmcb, vmcb12);
> > 		svm->sysenter_eip_hi = 0;
> > 		svm->sysenter_esp_hi = 0;
> > 	} else {
> > 		svm_copy_vmloadsave_state(vmcb12, svm->vmcb);
> > 	}
> > 
> > From commit adc2a23734ac ("KVM: nSVM: improve SYSENTER emulation on AMD"):
> >     
> >     3. Disable vmload/vmsave virtualization if vendor=GenuineIntel.
> >        (It is somewhat insane to set vendor=GenuineIntel and still enable
> >        SVM for the guest but well whatever).
> >        Then zero the high 32 bit parts when kvm intercepts and emulates vmload.
> > 
> > Presumably AMD hardware loads only the lower 32 bits, which would leave garbage
> > in the upper bits and even leak state from L1 to L2 (again ignoring the fact that
> > exposing SVM to an Intel vCPU is bonkers).
> Is it because L1 is a VM migrated from Intel platform to AMD's?

I believe so.

> So w/o commit adc2a23734ac ("KVM: nSVM: improve SYSENTER emulation on AMD"):
> 1> L1 could be a "GenuineIntel" with SVM capability (bizarre as it is), running
> in 64-bit mode.
> 2> With no interception of MSR writes to the SYSENTER_EIP/ESP, L1 may set its
> SYSENTER_EIP/ESP to a 64-bit value successfully (though sysenter/sysexit may
> fail).

Yes, though the MSRs don't need to be passed through, KVM emulates the full 64 bits
if the guest CPUID model is Intel.

> 3> L2 could be in 32-bit mode. And if virtual vmload/vmsave is enabled for L1,
> only lower 32 bits of those MSRs will be loaded, leaking the higher 32 bits.
> 
> Is above scenario the reason of Maxim's fix?

Yes, that's my understanding.

> But why it is related to nested migration? 

I understand why it's related, but I don't understand why we bothered to add "support"
for this.

In theory, if L1 is migrated by L0 while L1 is running an L2 that uses SYSENTER,
problems will occur.  I'm a bit lost as to how this matters in practice, as KVM
doesn't support cross-vendor nested virtualization, and if L1 can be enlightened
to the point where it can switch from VMX=>SVM during migration, what's the point
of doing a migration?

  reply	other threads:[~2023-02-24 16:16 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-17 23:10 [PATCH 00/12] KVM: x86: Add "governed" X86_FEATURE framework Sean Christopherson
2023-02-17 23:10 ` [PATCH 01/12] KVM: x86: Add a framework for enabling KVM-governed x86 features Sean Christopherson
2023-02-21 17:12   ` Vitaly Kuznetsov
2023-06-29  2:40   ` Binbin Wu
2023-06-29 16:26     ` Sean Christopherson
2023-06-30  8:01   ` Chao Gao
2023-06-30 15:31     ` Sean Christopherson
2023-02-17 23:10 ` [PATCH 02/12] KVM: x86/mmu: Use KVM-governed feature framework to track "GBPAGES enabled" Sean Christopherson
2023-02-17 23:10 ` [PATCH 03/12] KVM: VMX: Recompute "XSAVES enabled" only after CPUID update Sean Christopherson
2023-02-17 23:10 ` [PATCH 04/12] KVM: VMX: Rename XSAVES control to follow KVM's preferred "ENABLE_XYZ" Sean Christopherson
2023-02-17 23:10 ` [PATCH 05/12] KVM: x86: Use KVM-governed feature framework to track "XSAVES enabled" Sean Christopherson
2023-02-21 14:56   ` Yu Zhang
2023-02-22 18:56     ` Sean Christopherson
2023-02-24  9:54       ` Yu Zhang
2023-02-17 23:10 ` [PATCH 06/12] KVM: nSVM: Use KVM-governed feature framework to track "NRIPS enabled" Sean Christopherson
2023-02-17 23:10 ` [PATCH 07/12] KVM: nSVM: Use KVM-governed feature framework to track "TSC scaling enabled" Sean Christopherson
2023-02-17 23:10 ` [PATCH 08/12] KVM: nSVM: Use KVM-governed feature framework to track "vVM{SAVE,LOAD} enabled" Sean Christopherson
2023-02-21 15:23   ` Yu Zhang
2023-02-21 15:33     ` Yu Zhang
2023-02-21 23:48       ` Sean Christopherson
2023-02-22  6:49         ` Yu Zhang
2023-02-22 16:39           ` Sean Christopherson
2023-02-24  9:25             ` Yu Zhang
2023-02-24 16:16               ` Sean Christopherson [this message]
     [not found]                 ` <20230227065437.j7f7rfadut532fud@linux.intel.com>
2023-03-07 16:32                   ` Sean Christopherson
2023-06-29 16:50             ` Sean Christopherson
2023-06-30 10:00               ` Yu Zhang
2023-02-17 23:10 ` [PATCH 09/12] KVM: nSVM: Use KVM-governed feature framework to track "LBRv enabled" Sean Christopherson
2023-02-17 23:10 ` [PATCH 10/12] KVM: nSVM: Use KVM-governed feature framework to track "Pause Filter enabled" Sean Christopherson
2023-02-17 23:10 ` [PATCH 11/12] KVM: nSVM: Use KVM-governed feature framework to track "vGIF enabled" Sean Christopherson
2023-02-17 23:10 ` [PATCH 12/12] KVM: x86: Disallow guest CPUID lookups when IRQs are disabled Sean Christopherson

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