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[34.168.104.7]) by smtp.gmail.com with ESMTPSA id a22-20020aa795b6000000b005639a80af7bsm11460201pfk.75.2022.10.19.07.57.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Oct 2022 07:57:38 -0700 (PDT) Date: Wed, 19 Oct 2022 14:57:35 +0000 From: Sean Christopherson To: Borislav Petkov Cc: Jiaxi Chen , kvm@vger.kernel.org, tglx@linutronix.de, mingo@redhat.com, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, pbonzini@redhat.com, ndesaulniers@google.com, alexandre.belloni@bootlin.com, peterz@infradead.org, jpoimboe@kernel.org, chang.seok.bae@intel.com, pawan.kumar.gupta@linux.intel.com, babu.moger@amd.com, jmattson@google.com, sandipan.das@amd.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, fenghua.yu@intel.com, keescook@chromium.org, jane.malalane@citrix.com, nathan@kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 4/6] x86: KVM: Enable AVX-VNNI-INT8 CPUID and expose it to guest Message-ID: References: <20221019084734.3590760-1-jiaxi.chen@linux.intel.com> <20221019084734.3590760-5-jiaxi.chen@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Wed, Oct 19, 2022, Borislav Petkov wrote: > On Wed, Oct 19, 2022 at 04:47:32PM +0800, Jiaxi Chen wrote: > > AVX-VNNI-INT8 is a new set of instructions in the latest Intel platform > > Sierra Forest. It multiplies the individual bytes of two unsigned or > > unsigned source operands, then add and accumulate the results into the > > destination dword element size operand. This instruction allows for the > > platform to have superior AI capabilities. > > > > The bit definition: > > CPUID.(EAX=7,ECX=1):EDX[bit 4] > > For this particular one, use scattered.c instead of adding a new leaf. Unless the kernel wants to use X86_FEATURE_AVX_VNNI_INT8, which seems unlikely, there's no need to create a scattered entry. This can be handled in KVM by adding a KVM-only leaf entry (which will be needed no matter what), plus a #define for X86_FEATURE_AVX_VNNI_INT8 to direct it to the KVM entry. E.g. diff --git a/arch/x86/kvm/reverse_cpuid.h b/arch/x86/kvm/reverse_cpuid.h index a19d473d0184..25e7bfc61607 100644 --- a/arch/x86/kvm/reverse_cpuid.h +++ b/arch/x86/kvm/reverse_cpuid.h @@ -13,6 +13,7 @@ */ enum kvm_only_cpuid_leafs { CPUID_12_EAX = NCAPINTS, + CPUID_7_1_EDX, NR_KVM_CPU_CAPS, NKVMCAPINTS = NR_KVM_CPU_CAPS - NCAPINTS, @@ -24,6 +25,16 @@ enum kvm_only_cpuid_leafs { #define KVM_X86_FEATURE_SGX1 KVM_X86_FEATURE(CPUID_12_EAX, 0) #define KVM_X86_FEATURE_SGX2 KVM_X86_FEATURE(CPUID_12_EAX, 1) +#define KVM_X86_FEATURE_AVX_VNNI_INT8 KVM_X86_FEATURE(CPUID_7_1_EDX, 4) + +/* + * Alias X86_FEATURE_* to the KVM variant for features in KVM-only leafs that + * aren't scattered by cpufeatures.h so that X86_FEATURE_* can be used in KVM, + * e.g. to query guest CPUID. As a bonus, no translation is needed for these + * features in __feature_translate(). + */ +#define X86_FEATURE_AVX_VNNI_INT8 KVM_X86_FEATURE_AVX_VNNI_INT8 + struct cpuid_reg { u32 function; u32 index; @@ -48,6 +59,7 @@ static const struct cpuid_reg reverse_cpuid[] = { [CPUID_7_1_EAX] = { 7, 1, CPUID_EAX}, [CPUID_12_EAX] = {0x00000012, 0, CPUID_EAX}, [CPUID_8000_001F_EAX] = {0x8000001f, 0, CPUID_EAX}, + [CPUID_7_1_EDX] = { 7, 1, CPUID_EDX}, }; /*